dc.contributor.author | Sze, Vivienne | |
dc.contributor.author | Chen, Yuhsin | |
dc.contributor.author | Emer, Joel S | |
dc.contributor.author | Suleiman, Amr AbdulZahir | |
dc.contributor.author | Zhang, Zhengdong | |
dc.date.accessioned | 2017-04-28T19:36:27Z | |
dc.date.available | 2017-04-28T19:36:27Z | |
dc.date.issued | 2017-05 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/108508 | |
dc.description.abstract | Machine learning plays a critical role in extracting meaningful information out of the zetabytes of sensor data collected every day. For some applications, the goal is to analyze and understand the data to identify trends (e.g., surveillance, portable/wearable electronics); in other applications, the goal is to take immediate action based the data (e.g., robotics/drones, self-driving cars, smart Internet of Things). For many of these applications, local embedded processing near the sensor is preferred over the cloud due to privacy or latency concerns, or limitations in the communication bandwidth. However, at the sensor there are often stringent constraints on energy consumption and cost in addition to throughput and accuracy requirements. Furthermore, flexibility is often required such that the processing can be adapted for different applications or environments (e.g., update the weights and model in the classifier). In many applications, machine learning often involves transforming the input data into a higher dimensional space, which, along with programmable weights, increases data movement and consequently energy consumption. In this paper, we will discuss how these challenges can be addressed at various levels of hardware design ranging from architecture, hardware-friendly algorithms, mixed-signal circuits, and advanced technologies (including memories and sensors). | en_US |
dc.description.sponsorship | United States. Defense Advanced Research Projects Agency (DARPA) | en_US |
dc.description.sponsorship | Texas Instruments Incorporated | en_US |
dc.description.sponsorship | Intel Corporation | en_US |
dc.language.iso | en_US | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://ieee-cicc.org/wp-content/uploads/2017/04/Full-Mon-Wed-Program-170418.pdf | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | Sze | en_US |
dc.title | Hardware for Machine Learning: Challenges and Opportunities | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Sze, Vivienne, Yu-Hsin Chen, Joel Emer, Amr Suleiman, and Zhengdong Zhang. "Hardware for Machine Learning: Challenges and Opportunities." In 2017 IEEE Custom Integrated Circuits Conference, CICC Technical Program, April 30-May 3, 2017, Van Zandt Hotel, Austin, TX, USA. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.approver | Sze, Vivienne | en_US |
dc.contributor.mitauthor | Sze, Vivienne | |
dc.contributor.mitauthor | Chen, Yuhsin | |
dc.contributor.mitauthor | Emer, Joel S | |
dc.contributor.mitauthor | Suleiman, Amr AbdulZahir | |
dc.contributor.mitauthor | Zhang, Zhengdong | |
dc.relation.journal | IEEE Custom Integrated Circuits Conference, 2017 | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dspace.orderedauthors | Sze, Vivienne; Chen, Yu-Hsin; Emer, Joel; Suleiman, Amr; Zhang, Zhengdong | en_US |
dspace.embargo.terms | N | en_US |
dc.identifier.orcid | https://orcid.org/0000-0003-4841-3990 | |
dc.identifier.orcid | https://orcid.org/0000-0002-3459-5466 | |
dc.identifier.orcid | https://orcid.org/0000-0002-0376-4220 | |
dc.identifier.orcid | https://orcid.org/0000-0002-0619-8199 | |
mit.license | OPEN_ACCESS_POLICY | en_US |