High Performance, Point-to-Point, Transmission Line Signaling
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VLSI.1998.084860.pdf
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Author(s)
DeHon, Andre
Knight Jr, Thomas F
Date Issued
January 1998
Journal
VLSI Design
Publisher
Hindawi Publishing Corporation
Citation
Dehon, André, and Thomas F. Knight. “High Performance, Point-to-Point, Transmission Line Signaling.” VLSI Design 7.1 (1998): 111–129. © 1998 Hindawi Publishing Corporation
Version
Final published version
Abstract
Inter-chip signaling latency and bandwidth can be key factors limiting the performance of large VLSI systems. We present a high performance, transmission line signaling scheme for point-to-point communications between VLSI components. In particular, we detail circuitry which allows a pad driver to sense the voltage level on the attached pad during signaling and adjust the drive impedance to match the external transmission line impedance. This allows clean, reflection-free signaling despite the wide range of variations common in IC device processing and interconnect fabrication. Further, we show how similar techniques can be used to adjust the arrival time of signals to allow high signaling bandwidth despite variations in interconnect delays.This scheme employed for high performance signaling is a specific embodiment of a more general technique. Conventional electronic systems must accommodate a range of system characteristics (e.g. delay, voltage, impedance). As a result, circuit designers traditionally build large operating margins into their circuits to guarantee proper operation across all possible ranges of these
characteristics. These margins are generally added at the expense of performance. The alternative scheme exemplified here is to sample these system characteristics in the device's final operating environment and use this feedback to tune system operation around the observed characteristics. This tuning operation reduces the range of characteristics the system must accommodate, allowing increased performance. We briefly contrast this sampled, system-level feedback with the
more conventional, fine-grained feedback employed on ICs (e.g. PLLs).
MIT Department
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
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DOI of Published Version
https://doi.org/10.1155/1998/84860
