dc.contributor.author | Emer, Joel | |
dc.contributor.author | Jeffrey, Mark Christopher | |
dc.contributor.author | Subramanian, Suvinay | |
dc.contributor.author | Yan, Cong | |
dc.contributor.author | Sanchez, Daniel | |
dc.date.accessioned | 2017-10-23T19:01:15Z | |
dc.date.available | 2017-10-23T19:01:15Z | |
dc.date.issued | 2015-12 | |
dc.identifier.issn | 978-1-4503-4034-2 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/111962 | |
dc.description.abstract | We present Swarm, a novel architecture that exploits ordered irregular parallelism, which is abundant but hard to mine with current software and hardware techniques. In this architecture, programs consist of short tasks with programmer-specified timestamps. Swarm executes tasks speculatively and out of order, and efficiently speculates thousands of tasks ahead of the earliest active task to uncover ordered parallelism. Swarm builds on prior TLS and HTM schemes, and contributes several new techniques that allow it to scale to large core counts and speculation windows, including a new execution model, speculation-aware hardware task management, selective aborts, and scalable ordered commits.
We evaluate Swarm on graph analytics, simulation, and database benchmarks. At 64 cores, Swarm achieves 51--122× speedups over a single-core system, and out-performs software-only parallel algorithms by 3--18×. | en_US |
dc.description.sponsorship | National Science Foundation (U.S.) (Award CAREER-145299) | en_US |
dc.language.iso | en_US | |
dc.publisher | Association for Computing Machinery (ACM) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1145/2830772.2830777 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | MIT Web Domain | en_US |
dc.title | A scalable architecture for ordered parallelism | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Jeffrey, Mark C. et al. “A Scalable Architecture for Ordered Parallelism.” Proceedings of the 48th International Symposium on Microarchitecture (MICRO-48), December 5-9, 2015, Waikiki, Hawaii, USA, Association for Computing Machinery (ACM), December 2015 © 2015 Association for Computing Machinery (ACM) | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.mitauthor | Jeffrey, Mark Christopher | |
dc.contributor.mitauthor | Subramanian, Suvinay | |
dc.contributor.mitauthor | Yan, Cong | |
dc.contributor.mitauthor | Sanchez Martin, Daniel | |
dc.relation.journal | Proceedings of the 48th International Symposium on Microarchitecture (MICRO-48) | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dspace.orderedauthors | Jeffrey, Mark C.; Subramanian, Suvinay; Yan, Cong; Emer, Joel; Sanchez, Daniel | en_US |
dspace.embargo.terms | N | en_US |
dc.identifier.orcid | https://orcid.org/0000-0003-4816-0356 | |
dc.identifier.orcid | https://orcid.org/0000-0001-7701-8303 | |
dc.identifier.orcid | https://orcid.org/0000-0003-2738-1803 | |
dc.identifier.orcid | https://orcid.org/0000-0002-2453-2904 | |
dspace.mitauthor.error | true | |
mit.license | OPEN_ACCESS_POLICY | en_US |