dc.contributor.author | Wang, Bing | |
dc.contributor.author | Lee, Kwang Hong | |
dc.contributor.author | Wang, Cong | |
dc.contributor.author | Wang, Yue | |
dc.contributor.author | Made, Riko I. | |
dc.contributor.author | Sasangka, Wardhana Aji | |
dc.contributor.author | Nguyen, Viet Cuong | |
dc.contributor.author | Lee, Kenneth Eng Kian | |
dc.contributor.author | Tan, Chuan Seng | |
dc.contributor.author | Yoon, Soon Fatt | |
dc.contributor.author | Fitzgerald, Eugene A | |
dc.contributor.author | Michel, Jurgen | |
dc.date.accessioned | 2017-10-31T15:01:05Z | |
dc.date.available | 2017-10-31T15:01:05Z | |
dc.date.issued | 2017-02 | |
dc.identifier.issn | 0277-786X | |
dc.identifier.issn | 1996-756X | |
dc.identifier.uri | http://hdl.handle.net/1721.1/112093 | |
dc.description.abstract | The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems. | en_US |
dc.publisher | SPIE | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1117/12.2252030 | en_US |
dc.rights | Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. | en_US |
dc.source | SPIE | en_US |
dc.title | The integration of InGaP LEDs with CMOS on 200 mm silicon wafers | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Wang, Bing et al. “The Integration of InGaP LEDs with CMOS on 200 Mm Silicon Wafers.” Proceedings of SPIE, Smart Photonic and Optoelectronic Integrated Circuits XIX, January 28 - February 2 2017, Bellingham, Washington, USA, edited by Louay A. Eldada et al., SPIE, February 2017: © 2017 SPIE | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Materials Science and Engineering | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Microphotonics Center | en_US |
dc.contributor.mitauthor | Fitzgerald, Eugene A | |
dc.contributor.mitauthor | Michel, Jurgen | |
dc.relation.journal | Proceedings of SPIE--the Society of Photo-Optical Instrumentation Engineers | en_US |
dc.eprint.version | Final published version | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dc.date.updated | 2017-10-06T11:48:19Z | |
dspace.orderedauthors | Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen | en_US |
dspace.embargo.terms | N | en_US |
dc.identifier.orcid | https://orcid.org/0000-0002-1891-1959 | |
mit.license | PUBLISHER_POLICY | en_US |