dc.contributor.author | Zhang, Guowei | |
dc.contributor.author | Horn, Webb H | |
dc.contributor.author | Sanchez, Daniel | |
dc.date.accessioned | 2017-12-15T22:45:02Z | |
dc.date.available | 2017-12-15T22:45:02Z | |
dc.date.issued | 2015-12 | |
dc.identifier.isbn | 978-1-4503-4034-2 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/112771 | |
dc.description.abstract | We present Coup, a technique to lower the cost of updates to shared data in cache-coherent systems. Coup exploits the insight that many update operations, such as additions and bitwise logical operations, are commutative: they produce the same final result regardless of the order they are performed in. Coup allows multiple private caches to simultaneously hold update-only permission to the same cache line. Caches with update-only permission can locally buffer and coalesce updates to the line, but cannot satisfy read requests. Upon a read request, Coup reduces the partial updates buffered in private caches to produce the final value. Coup integrates seamlessly into existing coherence protocols, requires inexpensive hardware, and does not affect the memory consistency model.
We apply Coup to speed up single-word updates to shared data. On a simulated 128-core, 8-socket system, Coup accelerates state-of-the-art implementations of update-heavy algorithms by up to 2.4×. | en_US |
dc.description.sponsorship | Center for Future Architectures Research | en_US |
dc.description.sponsorship | National Science Foundation (U.S.) (CAREER-1452994) | en_US |
dc.description.sponsorship | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Grier Presidential Fellowship) | en_US |
dc.description.sponsorship | Microelectronics Advanced Research Corporation | en_US |
dc.description.sponsorship | United States. Defense Advanced Research Projects Agency | en_US |
dc.language.iso | en_US | |
dc.publisher | Association for Computing Machinery (ACM) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1145/2830772.2830774 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | MIT Web Domain | en_US |
dc.title | Exploiting commutativity to reduce the cost of updates to shared data in cache-coherent systems | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Zhang, Guowei, Webb Horn, and Daniel Sanchez. “Exploiting Commutativity to Reduce the Cost of Updates to Shared Data in Cache-Coherent Systems.” Proceedings of the 48th International Symposium on Microarchitecture - MICRO-48 (2015). | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.mitauthor | Zhang, Guowei | |
dc.contributor.mitauthor | Horn, Webb H | |
dc.contributor.mitauthor | Sanchez, Daniel | |
dc.relation.journal | Proceedings of the 48th International Symposium on Microarchitecture (MICRO-48) | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dspace.orderedauthors | Zhang, Guowei; Horn, Webb; Sanchez, Daniel | en_US |
dspace.embargo.terms | N | en_US |
dc.identifier.orcid | https://orcid.org/0000-0003-1034-2306 | |
mit.license | OPEN_ACCESS_POLICY | en_US |