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dc.contributor.authorSze, Vivienne
dc.contributor.authorChen, Yu-Hsin
dc.contributor.authorEiner, Joel
dc.contributor.authorSuleiman, Amr AbdulZahir
dc.contributor.authorZhang, Zhengdong
dc.date.accessioned2017-12-29T18:59:23Z
dc.date.available2017-12-29T18:59:23Z
dc.date.issued2017-07
dc.date.submitted2017-04
dc.identifier.isbn978-1-5090-5191-5
dc.identifier.urihttp://hdl.handle.net/1721.1/112983
dc.description.abstractMachine learning plays a critical role in extracting meaningful information out of the zetabytes of sensor data collected every day. For some applications, the goal is to analyze and understand the data to identify trends (e.g., surveillance, portable/wearable electronics); in other applications, the goal is to take immediate action based the data (e.g., robotics/drones, self-driving cars, smart Internet of Things). For many of these applications, local embedded processing near the sensor is preferred over the cloud due to privacy or latency concerns, or limitations in the communication bandwidth. However, at the sensor there are often stringent constraints on energy consumption and cost in addition to throughput and accuracy requirements. Furthermore, flexibility is often required such that the processing can be adapted for different applications or environments (e.g., update the weights and model in the classifier). In many applications, machine learning often involves transforming the input data into a higher dimensional space, which, along with programmable weights, increases data movement and consequently energy consumption. In this paper, we will discuss how these challenges can be addressed at various levels of hardware design ranging from architecture, hardware-friendly algorithms, mixed-signal circuits, and advanced technologies (including memories and sensors).en_US
dc.description.sponsorshipUnited States. Defense Advanced Research Projects Agency (Young Faculty Award)en_US
dc.description.sponsorshipMassachusetts Institute of Technology. Center for Integrated Circuits and Systemsen_US
dc.description.sponsorshipTSMC University Shuttleen_US
dc.description.sponsorshipTexas Instrumentsen_US
dc.description.sponsorshipIntelen_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/CICC.2017.7993626en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourcearXiven_US
dc.titleHardware for machine learning: Challenges and opportunitiesen_US
dc.typeArticleen_US
dc.identifier.citationSze, Vivienne, et al. "Hardware for Machine Learning: Challenges and Opportunities." Custom Integrated Circuits Conference (CICC), 30 April - 3 May, 2017, Austin, TX, IEEE, 2017, pp. 1–8.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.mitauthorSze, Vivienne
dc.contributor.mitauthorChen, Yu-Hsin
dc.contributor.mitauthorEiner, Joel
dc.contributor.mitauthorSuleiman, Amr AbdulZahir
dc.contributor.mitauthorZhang, Zhengdong
dc.relation.journal2017 IEEE Custom Integrated Circuits Conference (CICC)en_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dspace.orderedauthorsSze, Vivienne; Chen, Yu-Hsin; Einer, Joel; Suleiman, Amr; Zhang, Zhengdongen_US
dspace.embargo.termsNen_US
dc.identifier.orcidhttps://orcid.org/0000-0003-4841-3990
dc.identifier.orcidhttps://orcid.org/0000-0002-4403-956X
dc.identifier.orcidhttps://orcid.org/0000-0002-0376-4220
dc.identifier.orcidhttps://orcid.org/0000-0002-0619-8199
mit.licenseOPEN_ACCESS_POLICYen_US


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