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dc.contributor.authorHaider, Syed Kamran
dc.contributor.authorvan Dijk, Marten
dc.contributor.authorYu, Xiangyao
dc.contributor.authorRen, Ling
dc.contributor.authorFletcher, Christopher Wardlaw
dc.contributor.authorKwon, Albert Hyukjae
dc.contributor.authorDevadas, Srinivas
dc.date.accessioned2018-01-10T19:06:51Z
dc.date.available2018-01-10T19:06:51Z
dc.date.issued2015-06
dc.identifier.issn978-1-4503-3402-0
dc.identifier.urihttp://hdl.handle.net/1721.1/113047
dc.description.abstractOblivious RAM (ORAM) is an established technique to hide the access pattern to an untrusted storage system. With ORAM, a curious adversary cannot tell what address the user is accessing when observing the bits moving between the user and the storage system. All existing ORAM schemes achieve obliviousness by adding redundancy to the storage system, i.e., each access is turned into multiple random accesses. Such redundancy incurs a large performance overhead. Although traditional data prefetching techniques successfully hide memory latency in DRAM based systems, it turns out that they do not work well for ORAM because ORAM does not have enough memory bandwidth available for issuing prefetch requests. In this paper, we exploit ORAM locality by taking advantage of the ORAM internal structures. While it might seem apparent that obliviousness and locality are two contradictory concepts, we challenge this intuition by exploiting data locality in ORAM without sacrificing security. In particular, we propose a dynamic ORAM prefetching technique called PrORAM (Dynamic Prefetcher for ORAM) and comprehensively explore its design space. PrORAM detects data locality in programs at runtime, and exploits the locality without leaking any information on the access pattern. Our simulation results show that with PrORAM, the performance of ORAM can be significantly improved. PrORAM achieves an average performance gain of 20% over the baseline ORAM for memory intensive benchmarks among Splash2 and 5.5% for SPEC06 workloads. The performance gain for YCSB and TPCC in DBMS benchmarks is 23.6% and 5% respectively. On average, PrORAM offers twice the performance gain than that offered by a static super block scheme.en_US
dc.description.sponsorshipNational Science Foundation (U.S.)en_US
dc.description.sponsorshipQatar Computing Research Instituteen_US
dc.language.isoen_US
dc.publisherAssociation for Computing Machineryen_US
dc.relation.isversionofhttp://dx.doi.org/10.1145/2749469.2750413en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceMIT Web Domainen_US
dc.titlePrORAMen_US
dc.typeArticleen_US
dc.identifier.citationYu, Xiangyao, et al. "PrORAM: Dynamic Prefetcher for Oblivious RAM." ACM SIGARCH Computer Architecture News - ISCA'15, 13-17 June 2015, Portland, Oregon, ACM Press, 2015, pp. 616–28.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratoryen_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.mitauthorYu, Xiangyao
dc.contributor.mitauthorRen, Ling
dc.contributor.mitauthorFletcher, Christopher Wardlaw
dc.contributor.mitauthorKwon, Albert Hyukjae
dc.contributor.mitauthorDevadas, Srinivas
dc.relation.journalProceedings of the 42nd Annual International Symposium on Computer Architecture - ISCA '15en_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dspace.orderedauthorsYu, Xiangyao; Haider, Syed Kamran; Ren, Ling; Fletcher, Christopher; Kwon, Albert; van Dijk, Marten; Devadas, Srinivasen_US
dspace.embargo.termsNen_US
dc.identifier.orcidhttps://orcid.org/0000-0003-4317-3457
dc.identifier.orcidhttps://orcid.org/0000-0003-3437-7570
dc.identifier.orcidhttps://orcid.org/0000-0003-1467-2150
dc.identifier.orcidhttps://orcid.org/0000-0001-8253-7714
mit.licenseOPEN_ACCESS_POLICYen_US


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