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dc.contributor.authorLiu, Zhihong
dc.contributor.authorHeuken, Michael
dc.contributor.authorFahle, Dirk
dc.contributor.authorNg, G. I.
dc.contributor.authorPalacios, Tomas
dc.date.accessioned2018-06-05T17:40:07Z
dc.date.available2018-06-05T17:40:07Z
dc.date.issued2014-08
dc.date.submitted2014-06
dc.identifier.isbn978-1-4799-5406-3
dc.identifier.isbn978-1-4799-5405-6
dc.identifier.urihttp://hdl.handle.net/1721.1/116106
dc.description.abstractRecently the development of CMOS-compatible fabrication technologies for GaN HEMTs has attracted increasing levels of interest. A low temperature ohmic contact technology is required for gate-first device fabrication and CMOS-first GaN-Si integration process, however, typical ohmic contacts need annealing at > 800°C. In the past, we have reported an approach to realize low contact resistance (R[subscript C]) using CMOS-compatible metal schemes annealed at 500°C through an n[superscript +]-GaN/n-AlGaN/GaN structure [4]. This method has a drawback that the n-doped AlGaN barrier increases the gate leakage current. In this work, we present the first low temperature (< 450°C) CMOS-compatible Ti/Al ohmic contact technology for conventional unintentionally-doped AlGaN/AlN/GaN HEMT structures.en_US
dc.description.sponsorshipSingapore-MIT Alliance for Research and Technology (SMART)en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/DRC.2014.6872304en_US
dc.rightsCreative Commons Attribution-NoDerivativesen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/3.0en_US
dc.sourceBaylonen_US
dc.titleCMOS-Compatible Ti/Al Ohmic Contacts (Rc < 0.3 Ω mm) for u-AlGaN/AlN/GaN HEMTs by Low Temperature Annealing (< 450 °C)en_US
dc.typeArticleen_US
dc.identifier.citationLiu, Zhihong, et al. "CMOS-Compatible Ti/Al Ohmic Contacts (Rc < 0.3 Ω mm) for u-AlGaN/AlN/GaN HEMTs by Low Temperature Annealing (< 450 °C)." 2014 72nd Device Research Conference, 22-25 June, 2014, Santa Barbara, California, IEEE, 2014, pp. 75–76.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.departmentSingapore-MIT Alliance in Research and Technology (SMART)en_US
dc.contributor.approverPalacios, Tomasen_US
dc.contributor.mitauthorPalacios, Tomas
dc.relation.journal2014 72nd Device Research Conferenceen_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dspace.orderedauthorsLiu, Zhihong; Heuken, Michael; Fahle, Dirk; Ng, G. I.; Palacios, Tomasen_US
dspace.embargo.termsNen_US
dc.identifier.orcidhttps://orcid.org/0000-0002-2190-563X
mit.licenseOPEN_ACCESS_POLICYen_US


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