dc.contributor.author | Chavali, Raghu V. K. | |
dc.contributor.author | Gray, Jeffery L. | |
dc.contributor.author | Alam, Muhammad A. | |
dc.contributor.author | Johlin, Eric Carl | |
dc.contributor.author | Buonassisi, Anthony | |
dc.date.accessioned | 2018-11-19T13:55:01Z | |
dc.date.available | 2018-11-19T13:55:01Z | |
dc.date.issued | 2015-06 | |
dc.identifier.isbn | 978-1-4799-7944-8 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/119177 | |
dc.description.abstract | The cell-to-panel efficiency gap observed in a-Si/c-Si heterojunction solar cells is one of the key challenges of this technology. To systematically address this issue, we describe an end-to-end modeling framework to explore the implications of process and device variation at the module level. First, a process model is developed to connect the a-Si deposition parameters to the device parameters. Next, a physics based device model is presented which captures the essential features of photo-current and diode injection current using the thermionic-diffusion theory. Using the process and device models, the effects of process conditions on cell performance are explored. Finally, the performance of the panel as a function of device and process parameters is explored to establish panel limits. The insights developed through this process-to-panel modeling framework will improve the understanding of the cell-to-panel efficiency gap of this commercially promising cell technology. | en_US |
dc.description.sponsorship | United States. Department of Energy. Solar Energy Research Institute | en_US |
dc.description.sponsorship | National Science Foundation (U.S.). Nano-Engineered Electronic Device Simulation | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/PVSC.2015.7356126 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | Other repository | en_US |
dc.title | Process-to-panel modeling of a-Si/c-Si heterojunction solar cells | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Chavali, Raghu V. K., Eric C. Johlin, Jeffery L. Gray, Tonio Buonassisi, and Muhammad A. Alam. “Process-to-Panel Modeling of a-Si/c-Si Heterojunction Solar Cells.” 2015 IEEE 42nd Photovoltaic Specialist Conference (PVSC) (June 2015). | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Mechanical Engineering | en_US |
dc.contributor.mitauthor | Johlin, Eric Carl | |
dc.contributor.mitauthor | Buonassisi, Anthony | |
dc.relation.journal | 2015 IEEE 42nd Photovoltaic Specialist Conference (PVSC) | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dc.date.updated | 2018-10-31T15:37:19Z | |
dspace.orderedauthors | Chavali, Raghu V. K.; Johlin, Eric C.; Gray, Jeffery L.; Buonassisi, Tonio; Alam, Muhammad A. | en_US |
dspace.embargo.terms | N | en_US |
dc.identifier.orcid | https://orcid.org/0000-0001-8345-4937 | |
mit.license | OPEN_ACCESS_POLICY | en_US |