Nanostructured GaN transistors
Author(s)Chowdhury, Nadim; Palacios, Tomas
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This paper describes how the use of nanostructures can significantly increase the performance of GaN transistors. 100-400 nm fins have been defined underneath the gate electrode of AlGaN/GaN transistors to increase the gate modulation efficiency of these devices and to allow for the tuning of the threshold voltage. The proper design of these fins allows not only an improvement in the DC performance of the device, but also a significant enhancement of the rf linearity of the transistors. The excellent electron transport in these nanostructures, combined with the wide bandgap of GaN, its large effective mass and its moderate electric permittivity, also allows the potential scaling of GaN transistors below 5 nm channel length. The theoretical performance of these ultra-scaled devices is benchmarked with respect to other competing technologies.
DepartmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)
Chowdhury, Nadim, and Tomas Palacios. “Nanostructured GaN Transistors.” 2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), Miami, FL, USA, 22-25 October 2017, IEEE, 2017, pp. 1–3.
Author's final manuscript