| dc.contributor.author | Khurana, Harneet Singh | |
| dc.contributor.author | Chandrakasan, Anantha P | |
| dc.contributor.author | Lee, Hae-Seung | |
| dc.date.accessioned | 2019-10-08T13:48:51Z | |
| dc.date.available | 2019-10-08T13:48:51Z | |
| dc.date.issued | 2018-05 | |
| dc.date.submitted | 2018-05 | |
| dc.identifier.isbn | 9781538648810 | |
| dc.identifier.isbn | 2379-447X | |
| dc.identifier.uri | https://hdl.handle.net/1721.1/122461 | |
| dc.description.abstract | Least Significant Bit-first (LSB-first) algorithm is suitable for low-activity signals as it reduces DAC activity and the number of bit-cycles required per conversion. However, certain code transitions degrade performance by requiring large switching energy and number of bit-cycles even when the code change over previous code is small. This paper addresses it by a new algorithm called Recode then LSB-first (RLSB-first) that reduces the switching energy required for all cases of small code change across the full range of possible previous sample codes. The energy reduction is achieved while maintaining a low number of bit-cycles per conversion. | en_US |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
| dc.relation.isversionof | http://dx.doi.org/10.1109/iscas.2018.8350901 | en_US |
| dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
| dc.source | Prof. Chandrakasan | en_US |
| dc.title | Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles | en_US |
| dc.type | Article | en_US |
| dc.identifier.citation | Khurana, Harneet Singh et al. "Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles." 2018 IEEE International Symposium on Circuits and Systems (ISCAS), May 2018, Florence, Italy, Institute of Electrical and Electronics Engineers (IEEE), May 2018 © 2018 IEEE | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
| dc.relation.journal | 2018 IEEE International Symposium on Circuits and Systems (ISCAS) | en_US |
| dc.eprint.version | Author's final manuscript | en_US |
| dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
| eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
| dspace.date.submission | 2019-10-04T13:08:48Z | |