dc.contributor.author | Biswas, Avishek | |
dc.contributor.author | Arslan, Umut | |
dc.contributor.author | Hamzaoglu, Fatih | |
dc.contributor.author | Chandrakasan, Anantha P | |
dc.date.accessioned | 2019-10-08T15:21:37Z | |
dc.date.available | 2019-10-08T15:21:37Z | |
dc.date.issued | 2017-07 | |
dc.date.submitted | 2017-04 | |
dc.identifier.isbn | 9781509051915 | |
dc.identifier.issn | 2152-3630 | |
dc.identifier.uri | https://hdl.handle.net/1721.1/122465 | |
dc.description.abstract | This paper presents a low-offset read sensing scheme for resistive memories. Due to increasing device variations in sub-32 nm CMOS processes, it becomes very challenging to design a high yield and low-offset read-sensing scheme. In this work we address these issues by using a pseudo-differential sensing scheme to get 2× signal margin and by full offset cancellation of the sense-amplifier, making it more suitable to tolerate variation from the memory array due to storage device resistance variation. Measurement results show the sense-amplifier can work with a 20mV input, which makes it ideal for small-signal sensing for resistive memories. | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/cicc.2017.7993689 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | Prof. Chandrakasan via Phoebe Ayers | en_US |
dc.title | An offset-cancelling four-phase voltage sense amplifier for resistive memories in 14nm CMOS | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Biswas, Avishek et al. "An offset-cancelling four-phase voltage sense amplifier for resistive memories in 14nm CMOS." IEEE Custom Integrated Circuits Conference (CICC), April-May 2017, Austin, Texas, USA, IEEE Custom Integrated Circuits Conference (CICC), July 2017. © 2017 IEEE | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.relation.journal | IEEE Custom Integrated Circuits Conference (CICC) | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dspace.date.submission | 2019-10-02T15:52:46Z | |
mit.journal.volume | 2017 | en_US |