dc.contributor.author | Yu, Xiangyao | |
dc.contributor.author | Ren, Ling | |
dc.contributor.author | Fletcher, Christopher Wardlaw | |
dc.contributor.author | Kwon, Albert Hyukjae | |
dc.contributor.author | Devadas, Srinivas | |
dc.date.accessioned | 2021-02-19T13:40:39Z | |
dc.date.available | 2021-02-19T13:40:39Z | |
dc.date.issued | 2015-06 | |
dc.identifier.isbn | 78-1-4503-3402-0/15/06 | |
dc.identifier.issn | 0163-5964 | |
dc.identifier.issn | 1063-6897 | |
dc.identifier.uri | https://hdl.handle.net/1721.1/129832 | |
dc.description.abstract | Oblivious RAM (ORAM) is an established technique tohide the access pattern to an untrusted storage system. WithORAM, a curious adversary cannot tell what address the useris accessing when observing the bits moving between the userand the storage system. All existing ORAM schemes achieveobliviousness by adding redundancy to the storage system, i.e.,each access is turned into multiple random accesses. Suchredundancy incurs a large performance overhead.Although traditional data prefetching techniques success-fully hide memory latency in DRAM based systems, it turns outthat they do not work well for ORAM because ORAM does nothave enough memory bandwidth available for issuing prefetchrequests. In this paper, we exploit ORAM locality by taking ad-vantage of the ORAM internal structures. While it might seemapparent that obliviousness and locality are two contradictoryconcepts, we challenge this intuition by exploiting data local-ity in ORAM without sacrificing security. In particular, we propose a dynamic ORAM prefetching technique called PrO-RAM (Dynamic Prefetcher for ORAM) and comprehensivelyexplore its design space. PrORAM detects data locality inprograms at runtime, and exploits the locality without leakingany information on the access pattern.Our simulation results show that with PrORAM, the per-formance of ORAM can be significantly improved. PrORAMachieves an average performance gain of 20% over the base-line ORAM for memory intensive benchmarks among Splash2and 5.5% for SPEC06 workloads. The performance gain forYCSB and TPCC in DBMS benchmarks is 23.6% and 5% re-spectively. On average, PrORAM offers twice the performancegain than that offered by a static super block scheme. | en_US |
dc.language.iso | en | |
dc.publisher | Association for Computing Machinery (ACM) | en_US |
dc.relation.isversionof | 10.1145/2872887.2750413 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | MIT web domain | en_US |
dc.title | PrORAM: dynamic prefetcher for oblivious RAM | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Yu, Xiangyao et al. “PrORAM: dynamic prefetcher for oblivious RAM.” Paper in ACM SIGARCH Computer Architecture News, 43, 3S, 2015 ACM/IEEE 42nd Annual International Symposium on Computer Architecture (ISCA), Portland, OR, 13-17 June 2015, Association for Computing Machinery (ACM) © 2015 The Author(s) | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.relation.journal | ACM SIGARCH Computer Architecture News | en_US |
dc.eprint.version | Final published version | en_US |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
dc.date.updated | 2020-12-09T18:59:40Z | |
dspace.orderedauthors | Yu, X; Haider, SK; Ren, L; Fletcher, C; Kwon, A; van Dijk, M; Devadas, S | en_US |
dspace.date.submission | 2020-12-09T18:59:44Z | |
mit.journal.volume | 43 | en_US |
mit.journal.issue | 3S | en_US |
mit.license | OPEN_ACCESS_POLICY | |
mit.metadata.status | Complete | |