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dc.contributor.authorYu, Xiangyao
dc.contributor.authorRen, Ling
dc.contributor.authorFletcher, Christopher Wardlaw
dc.contributor.authorKwon, Albert Hyukjae
dc.contributor.authorDevadas, Srinivas
dc.date.accessioned2021-02-19T13:40:39Z
dc.date.available2021-02-19T13:40:39Z
dc.date.issued2015-06
dc.identifier.isbn78-1-4503-3402-0/15/06
dc.identifier.issn0163-5964
dc.identifier.issn1063-6897
dc.identifier.urihttps://hdl.handle.net/1721.1/129832
dc.description.abstractOblivious RAM (ORAM) is an established technique tohide the access pattern to an untrusted storage system. WithORAM, a curious adversary cannot tell what address the useris accessing when observing the bits moving between the userand the storage system. All existing ORAM schemes achieveobliviousness by adding redundancy to the storage system, i.e.,each access is turned into multiple random accesses. Suchredundancy incurs a large performance overhead.Although traditional data prefetching techniques success-fully hide memory latency in DRAM based systems, it turns outthat they do not work well for ORAM because ORAM does nothave enough memory bandwidth available for issuing prefetchrequests. In this paper, we exploit ORAM locality by taking ad-vantage of the ORAM internal structures. While it might seemapparent that obliviousness and locality are two contradictoryconcepts, we challenge this intuition by exploiting data local-ity in ORAM without sacrificing security. In particular, we propose a dynamic ORAM prefetching technique called PrO-RAM (Dynamic Prefetcher for ORAM) and comprehensivelyexplore its design space. PrORAM detects data locality inprograms at runtime, and exploits the locality without leakingany information on the access pattern.Our simulation results show that with PrORAM, the per-formance of ORAM can be significantly improved. PrORAMachieves an average performance gain of 20% over the base-line ORAM for memory intensive benchmarks among Splash2and 5.5% for SPEC06 workloads. The performance gain forYCSB and TPCC in DBMS benchmarks is 23.6% and 5% re-spectively. On average, PrORAM offers twice the performancegain than that offered by a static super block scheme.en_US
dc.language.isoen
dc.publisherAssociation for Computing Machinery (ACM)en_US
dc.relation.isversionof10.1145/2872887.2750413en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceMIT web domainen_US
dc.titlePrORAM: dynamic prefetcher for oblivious RAMen_US
dc.typeArticleen_US
dc.identifier.citationYu, Xiangyao et al. “PrORAM: dynamic prefetcher for oblivious RAM.” Paper in ACM SIGARCH Computer Architecture News, 43, 3S, 2015 ACM/IEEE 42nd Annual International Symposium on Computer Architecture (ISCA), Portland, OR, 13-17 June 2015, Association for Computing Machinery (ACM) © 2015 The Author(s)en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.relation.journalACM SIGARCH Computer Architecture Newsen_US
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
eprint.statushttp://purl.org/eprint/status/PeerRevieweden_US
dc.date.updated2020-12-09T18:59:40Z
dspace.orderedauthorsYu, X; Haider, SK; Ren, L; Fletcher, C; Kwon, A; van Dijk, M; Devadas, Sen_US
dspace.date.submission2020-12-09T18:59:44Z
mit.journal.volume43en_US
mit.journal.issue3Sen_US
mit.licenseOPEN_ACCESS_POLICY
mit.metadata.statusComplete


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