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dc.contributor.authorTsai, Po-An
dc.contributor.authorBeckmann, Nathan Zachary
dc.contributor.authorSanchez, Daniel
dc.date.accessioned2021-04-12T18:04:27Z
dc.date.available2021-04-12T18:04:27Z
dc.date.issued2017-06
dc.identifier.isbn78-1-4503-4892-8/
dc.identifier.issn0163-5964
dc.identifier.urihttps://hdl.handle.net/1721.1/130452
dc.description.abstractCaches are traditionally organized as a rigid hierarchy, with multiple levels of progressively larger and slower memories. Hierarchy allows a simple, fixed design to benefit a wide range of applications, since working sets settle at the smallest (i.e., fastest and most energy-efficient) level they fit in. However, rigid hierarchies also add overheads, because each level adds latency and energy even when it does not fit the working set. These overheads are expensive on emerging systems with heterogeneous memories, where the differences in latency and energy across levels are small. Significant gains are possible by specializing the hierarchy to applications. We propose Jenga, a reconfigurable cache hierarchy that dynamically and transparently specializes itself to applications. Jenga builds virtual cache hierarchies out of heterogeneous, distributed cache banks using simple hardware mechanisms and an OS runtime. In contrast to prior techniques that trade energy and bandwidth for performance (e.g., dynamic bypassing or prefetching), Jenga eliminates accesses to unwanted cache levels. Jenga thus improves both performance and energy efficiency. On a 36-core chip with a 1 GB DRAM cache, Jenga improves energy-delay product over a combination of state-of-the-art techniques by 23% on average and by up to 85%.en_US
dc.description.sponsorshipNational Science Foundation (U.S.) (Grant CCF-1318384)en_US
dc.description.sponsorshipNational Science Foundation (U.S.). Career (Grant 1452994)en_US
dc.language.isoen
dc.publisherAssociation for Computing Machinery (ACM)en_US
dc.relation.isversionof10.1145/3140659.3080214en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceMIT web domainen_US
dc.titleJenga: Software-Defined Cache Hierarchiesen_US
dc.typeArticleen_US
dc.identifier.citationTsai, Po-An et al. “Jenga: Software-Defined Cache Hierarchies.” Paper in the Computer Architecture News, 45, 2, 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA), June 24-28, 2017, Toronto, ON, Canada, Association for Computing Machinery (ACM) © 2017 The Author(s)en_US
dc.contributor.departmentMassachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratoryen_US
dc.relation.journalComputer Architecture Newsen_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
eprint.statushttp://purl.org/eprint/status/PeerRevieweden_US
dc.date.updated2021-04-06T12:39:59Z
dspace.orderedauthorsTsai, P-A; Beckmann, N; Sanchez, Den_US
dspace.date.submission2021-04-06T12:40:00Z
mit.journal.volume45en_US
mit.journal.issue2en_US
mit.licenseOPEN_ACCESS_POLICY


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