dc.contributor.author | Banerjee, Utsav | |
dc.contributor.author | Wright, Andrew D. | |
dc.contributor.author | Juvekar, Chiraag | |
dc.contributor.author | Waller, Madeleine(Madeleine G.) | |
dc.contributor.author | Arvind, Arvind | |
dc.contributor.author | Chandrakasan, Anantha P | |
dc.date.accessioned | 2021-08-26T13:37:09Z | |
dc.date.available | 2021-08-26T13:37:09Z | |
dc.date.issued | 2019-08 | |
dc.identifier.issn | 0018-9200 | |
dc.identifier.issn | 1558-173X | |
dc.identifier.uri | https://hdl.handle.net/1721.1/131206 | |
dc.description.abstract | This paper presents the first hardware implementation of the datagram transport layer security (DTLS) protocol to enable end-to-end security for the Internet of Things (IoT). A key component of this design is a reconfigurable prime field elliptic curve cryptography (ECC) accelerator that is 238× and 9× more energy-efficient compared to software and state-of-the-art hardware, respectively. Our full hardware implementation of the DTLS 1.3 protocol provides 438× improvement in energy-efficiency over software, along with code size and data memory usage as low as 8 and 3 KB, respectively. The cryptographic accelerators are coupled with an on-chip low-power RISC-V processor to benchmark applications beyond DTLS with up to two orders of magnitude energy savings. The test chip, fabricated in 65-nm CMOS, demonstrates hardware-accelerated DTLS sessions while consuming 44.08 μJ/handshake and 0.89 nJ/byte of the encrypted data at 16 MHz and 0.8 V. | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/jssc.2019.2915203 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | Utsav Banerjee | en_US |
dc.title | An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Banerjee, Utsav et al. "An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications." IEEE Journal of Solid-State Circuits 54, 8 (August 2019): 2339 - 2352. © 2019 IEEE | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.approver | Banerjee, Utsav | en_US |
dc.relation.journal | IEEE Journal of Solid-State Circuits | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
dspace.date.submission | 2021-08-12T12:33:35Z | |
mit.journal.volume | 54 | en_US |
mit.journal.issue | 8 | en_US |
mit.license | OPEN_ACCESS_POLICY | |
mit.metadata.status | Complete | en_US |
mit.metadata.status | Complete | |