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dc.contributor.authorChen, Yu-Hsin
dc.contributor.authorYang, Tien-Ju
dc.contributor.authorEmer, Joel S
dc.contributor.authorSze, Vivienne
dc.date.accessioned2021-10-27T20:09:03Z
dc.date.available2021-10-27T20:09:03Z
dc.date.issued2019
dc.identifier.urihttps://hdl.handle.net/1721.1/134768
dc.description.abstract© 2011 IEEE. A recent trend in deep neural network (DNN) development is to extend the reach of deep learning applications to platforms that are more resource and energy-constrained, e.g., mobile devices. These endeavors aim to reduce the DNN model size and improve the hardware processing efficiency and have resulted in DNNs that are much more compact in their structures and/or have high data sparsity. These compact or sparse models are different from the traditional large ones in that there is much more variation in their layer shapes and sizes and often require specialized hardware to exploit sparsity for performance improvement. Therefore, many DNN accelerators designed for large DNNs do not perform well on these models. In this paper, we present Eyeriss v2, a DNN accelerator architecture designed for running compact and sparse DNNs. To deal with the widely varying layer shapes and sizes, it introduces a highly flexible on-chip network, called hierarchical mesh, that can adapt to the different amounts of data reuse and bandwidth requirements of different data types, which improves the utilization of the computation resources. Furthermore, Eyeriss v2 can process sparse data directly in the compressed domain for both weights and activations and therefore is able to improve both processing speed and energy efficiency with sparse models. Overall, with sparse MobileNet, Eyeriss v2 in a 65-nm CMOS process achieves a throughput of 1470.6 inferences/s and 2560.3 inferences/J at a batch size of 1, which is 12.6\times faster and 2.5\times more energy-efficient than the original Eyeriss running MobileNet.
dc.language.isoen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.relation.isversionof10.1109/JETCAS.2019.2910232
dc.rightsCreative Commons Attribution-Noncommercial-Share Alike
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/
dc.sourcearXiv
dc.titleEyeriss v2: A Flexible Accelerator for Emerging Deep Neural Networks on Mobile Devices
dc.typeArticle
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.relation.journalIEEE Journal on Emerging and Selected Topics in Circuits and Systems
dc.eprint.versionAuthor's final manuscript
dc.type.urihttp://purl.org/eprint/type/JournalArticle
eprint.statushttp://purl.org/eprint/status/PeerReviewed
dc.date.updated2019-07-03T16:40:55Z
dspace.orderedauthorsChen, Y-H; Yang, T-J; Emer, JS; Sze, V
dspace.date.submission2019-07-03T16:40:57Z
mit.journal.volume9
mit.journal.issue2
mit.metadata.statusAuthority Work and Publication Information Needed


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