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A scalable architecture for ordered irregular parallelism

dc.contributor.authorSanchez, Daniel
dc.date.accessioned2021-11-02T14:08:50Z
dc.date.available2021-11-02T14:08:50Z
dc.date.issued2015-11-15
dc.identifier.urihttps://hdl.handle.net/1721.1/137082
dc.language.isoen
dc.publisherACMen_US
dc.relation.isversionof10.1145/2833179.2833193en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceMIT web domainen_US
dc.titleA scalable architecture for ordered irregular parallelismen_US
dc.typeArticleen_US
dc.identifier.citationSanchez, Daniel. 2015. "A scalable architecture for ordered irregular parallelism."
dc.contributor.departmentMassachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dc.date.updated2019-07-03T13:20:17Z
dspace.date.submission2019-07-03T13:20:18Z
mit.licenseOPEN_ACCESS_POLICY
mit.metadata.statusAuthority Work and Publication Information Neededen_US


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