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dc.contributor.authorZhao, ZN
dc.contributor.authorJi, H
dc.contributor.authorYan, M
dc.contributor.authorYu, J
dc.contributor.authorFletcher, CW
dc.contributor.authorMorrison, A
dc.contributor.authorMarinov, D
dc.contributor.authorTorrellas, J
dc.date.accessioned2021-11-08T19:27:32Z
dc.date.available2021-11-08T19:27:32Z
dc.date.issued2020
dc.identifier.urihttps://hdl.handle.net/1721.1/137793
dc.description.abstract© 2020 IEEE Computer Society. All rights reserved. Many hardware-based defense schemes against speculative execution attacks use special mechanisms to protect instructions while speculative, and lift the mechanisms when the instructions turn non-speculative. In this paper, we observe that speculative instructions can sometimes become Speculation Invariant before turning non-speculative. Speculation invariance means that (i) whether the instruction will execute and (ii) the instruction's operands are not a function of speculative state. Hence, we propose to lift the protection mechanisms on these instructions early, when they become speculation invariant, and issue them without protection. As a result, we improve the performance of the defense schemes without changing their security properties. To exploit speculation invariance, we present the InvarSpec framework. InvarSpec includes a program analysis pass that identifies, for each relevant instruction i, the set of older instructions that are Safe for i-i.e., those that do not prevent i from becoming speculation invariant. At runtime, the InvarSpec micro-architecture loads this information and uses it to determine when speculative instructions can be issued without protection. InvarSpec is one of the first defense schemes for speculative execution that combines cooperative compiler and hardware mechanisms. Our evaluation shows that InvarSpec effectively reduces the execution overhead of hardware defense schemes. For example, on SPEC17, it reduces the average execution overhead of fence protections from 195.3% to 108.2%, of Delay-On-Miss from 39.5% to 24.4%, and of InvisiSpec from 15.4% to 10.9%.en_US
dc.language.isoen
dc.publisherIEEEen_US
dc.relation.isversionof10.1109/MICRO50266.2020.00094en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceMIT web domainen_US
dc.titleSpeculation invariance (invarspec): Faster safe execution through program analysisen_US
dc.typeArticleen_US
dc.identifier.citationZhao, ZN, Ji, H, Yan, M, Yu, J, Fletcher, CW et al. 2020. "Speculation invariance (invarspec): Faster safe execution through program analysis." Proceedings of the Annual International Symposium on Microarchitecture, MICRO, 2020-October.
dc.contributor.departmentMassachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.relation.journalProceedings of the Annual International Symposium on Microarchitecture, MICROen_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dc.date.updated2021-01-25T19:29:08Z
dspace.orderedauthorsZhao, ZN; Ji, H; Yan, M; Yu, J; Fletcher, CW; Morrison, A; Marinov, D; Torrellas, Jen_US
dspace.date.submission2021-01-25T19:29:17Z
mit.journal.volume2020-Octoberen_US
mit.licenseOPEN_ACCESS_POLICY
mit.metadata.statusAuthority Work and Publication Information Neededen_US


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