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dc.contributor.authorRenda, Alex
dc.contributor.authorChen, Yishen
dc.contributor.authorMendis, Charith
dc.contributor.authorCarbin, Michael
dc.date.accessioned2022-06-07T12:49:09Z
dc.date.available2022-06-07T12:49:09Z
dc.date.issued2020
dc.identifier.urihttps://hdl.handle.net/1721.1/142895
dc.description.abstract© 2020 IEEE. CPU simulators are useful tools for modeling CPU execution behavior. However, they suffer from inaccuracies due to the cost and complexity of setting their fine-grained parameters, such as the latencies of individual instructions. This complexity arises from the expertise required to design benchmarks and measurement frameworks that can precisely measure the values of parameters at such fine granularity. In some cases, these parameters do not necessarily have a physical realization and are therefore fundamentally approximate, or even unmeasurable.In this paper we present DiffTune, a system for learning the parameters of x86 basic block CPU simulators from coarse-grained end-to-end measurements. Given a simulator, DiffTune learns its parameters by first replacing the original simulator with a differentiable surrogate, another function that approximates the original function; by making the surrogate differentiable, DiffTune is then able to apply gradient-based optimization techniques even when the original function is non-differentiable, such as is the case with CPU simulators. With this differentiable surrogate, DiffTune then applies gradient-based optimization to produce values of the simulator's parameters that minimize the simulator's error on a dataset of ground truth end-to-end performance measurements. Finally, the learned parameters are plugged back into the original simulator.DiffTune is able to automatically learn the entire set of microarchitecture-specific parameters within the Intel x86 simulation model of llvm-mca, a basic block CPU simulator based on LLVM's instruction scheduling model. DiffTune's learned parameters lead llvm-mca to an average error that not only matches but lowers that of its original, expert-provided parameter values.en_US
dc.language.isoen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionof10.1109/MICRO50266.2020.00045en_US
dc.rightsCreative Commons Attribution-NonCommercial-ShareAlike 4.0 Internationalen_US
dc.rights.urihttps://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourcearXiven_US
dc.titleDiffTune: Optimizing CPU Simulator Parameters with Learned Differentiable Surrogatesen_US
dc.typeArticleen_US
dc.identifier.citationRenda, Alex, Chen, Yishen, Mendis, Charith and Carbin, Michael. 2020. "DiffTune: Optimizing CPU Simulator Parameters with Learned Differentiable Surrogates." Proceedings of the Annual International Symposium on Microarchitecture, MICRO, 2020-October.
dc.contributor.departmentMassachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.relation.journalProceedings of the Annual International Symposium on Microarchitecture, MICROen_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dc.date.updated2022-06-07T12:41:49Z
dspace.orderedauthorsRenda, A; Chen, Y; Mendis, C; Carbin, Men_US
dspace.date.submission2022-06-07T12:41:51Z
mit.journal.volume2020-Octoberen_US
mit.licenseOPEN_ACCESS_POLICY
mit.metadata.statusAuthority Work and Publication Information Neededen_US


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