A Fast Multiport Memory Based on Single-port Memory Cells

Abstract

We present a new design for dual-port memories that uses single-port memory cells but guarantees fast deterministic read/write access. The basic unit of storage is the word, rather than the bit, and addresses conflicts result in bit errors that are removed by correction circuitry. The addressing scheme uses Galois field arithmetic to guarantee that the maximum number of bit errors in any word accessed is one. These errors can be corrected every time with a simple correction scheme. The scheme can be generalized to an arbitrary number of ports.