Algorithms for Integrated Circuit Layout: An Analytic Approach
| dc.contributor.advisor | Rivest, Ronald L. | en_US |
| dc.contributor.author | LaPaugh, Andrea Suzanne | en_US |
| dc.date.accessioned | 2023-03-29T15:04:43Z | |
| dc.date.available | 2023-03-29T15:04:43Z | |
| dc.date.issued | 1980-11 | |
| dc.identifier.uri | https://hdl.handle.net/1721.1/149529 | |
| dc.description.abstract | In this thesis, the problem of designing the layout of integrated circuits is examined. The layout of an integrated circuit specifies the position of the chip of functional components and wires interconnecting the components. We use a general model | en_US |
| dc.relation.ispartofseries | MIT-LCS-TR-248 | |
| dc.title | Algorithms for Integrated Circuit Layout: An Analytic Approach | en_US |
| dc.identifier.oclc | 7032731 |
