Cache Coherence Protocols for Large-Scale Multiprocessors
dc.contributor.advisor | Agarwal, Anant | en_US |
dc.contributor.author | Chaiken, David Lars | en_US |
dc.date.accessioned | 2023-03-29T15:17:24Z | |
dc.date.available | 2023-03-29T15:17:24Z | |
dc.date.issued | 1990-09 | |
dc.identifier.uri | https://hdl.handle.net/1721.1/149698 | |
dc.description.abstract | Caches have the potential to provide multiprocessors with an automatic mechanism for reducing both network traffic and average memory access latency. However, cache-based systems must address the problem of cache coherence. | en_US |
dc.relation.ispartofseries | MIT-LCS-TR-489 | |
dc.title | Cache Coherence Protocols for Large-Scale Multiprocessors | en_US |
dc.identifier.oclc | 22601242 |