MIT Libraries logoDSpace@MIT

MIT
View Item 
  • DSpace@MIT Home
  • Computer Science and Artificial Intelligence Lab (CSAIL)
  • LCS Publications
  • LCS Technical Reports (1974 - 2003)
  • View Item
  • DSpace@MIT Home
  • Computer Science and Artificial Intelligence Lab (CSAIL)
  • LCS Publications
  • LCS Technical Reports (1974 - 2003)
  • View Item
JavaScript is disabled for your browser. Some features of this site may not work without it.

Maps: A Compiler-Managed Memory System for Software-Exposed Architectures

Author(s)
Barua, Rajeev
Thumbnail
DownloadMIT-LCS-TR-799.pdf (15.20Mb)
Advisor
Amarasinghe, Saman
Agarwal, Anant
Metadata
Show full item record
Abstract
Microprocessors must exploit both instruction-level parallelism (ILP) and memory parallelism for high performance. Sophisticated techniques for ILP have boosted the ability of modern-day microprocessors to exploit ILP when available. Unfortunately, impro
Date issued
2000-01
URI
https://hdl.handle.net/1721.1/149907
Series/Report no.
MIT-LCS-TR-799

Collections
  • LCS Technical Reports (1974 - 2003)

Browse

All of DSpaceCommunities & CollectionsBy Issue DateAuthorsTitlesSubjectsThis CollectionBy Issue DateAuthorsTitlesSubjects

My Account

Login

Statistics

OA StatisticsStatistics by CountryStatistics by Department
MIT Libraries
PrivacyPermissionsAccessibilityContact us
MIT
Content created by the MIT Libraries, CC BY-NC unless otherwise noted. Notify us about copyright concerns.