| dc.contributor.author | Maurya, Satvik | |
| dc.contributor.author | Mude, Chaithanya | |
| dc.contributor.author | Oliver, William | |
| dc.contributor.author | Lienhard, Benjamin | |
| dc.contributor.author | Tannu, Swamit | |
| dc.date.accessioned | 2023-07-11T19:18:26Z | |
| dc.date.available | 2023-07-11T19:18:26Z | |
| dc.date.issued | 2023-06-17 | |
| dc.identifier.isbn | 979-8-4007-0095-8 | |
| dc.identifier.uri | https://hdl.handle.net/1721.1/151100 | |
| dc.publisher | ACM|Proceedings of the 50th Annual International Symposium on Computer Architecture | en_US |
| dc.relation.isversionof | https://doi.org/10.1145/3579371.3589042 | en_US |
| dc.rights | Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. | en_US |
| dc.source | Association for Computing Machinery | en_US |
| dc.title | Scaling Qubit Readout with Hardware Efficient Machine Learning Architectures | en_US |
| dc.type | Article | en_US |
| dc.identifier.citation | Maurya, Satvik, Mude, Chaithanya, Oliver, William, Lienhard, Benjamin and Tannu, Swamit. 2023. "Scaling Qubit Readout with Hardware Efficient Machine Learning Architectures." | |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Physics | |
| dc.identifier.mitlicense | PUBLISHER_POLICY | |
| dc.eprint.version | Final published version | en_US |
| dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
| eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
| dc.date.updated | 2023-07-01T07:57:16Z | |
| dc.language.rfc3066 | en | |
| dc.rights.holder | The author(s) | |
| dspace.date.submission | 2023-07-01T07:57:17Z | |
| mit.license | PUBLISHER_POLICY | |
| mit.metadata.status | Authority Work and Publication Information Needed | en_US |
