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dc.contributor.authorWilliams, R. Ryan
dc.date.accessioned2024-07-12T15:55:53Z
dc.date.available2024-07-12T15:55:53Z
dc.date.issued2024-06-10
dc.identifier.isbn979-8-4007-0383-6
dc.identifier.urihttps://hdl.handle.net/1721.1/155669
dc.descriptionSTOC ’24, June 24–28, 2024, Vancouver, BC, Canadaen_US
dc.description.abstractMany results in fine-grained complexity reveal intriguing consequences from solving various SAT problems even slightly faster than exhaustive search. We prove a “self-improving” (or “bootstrapping”) theorem for Circuit-SAT, #Circuit-SAT, and its fully-quantified version: solving one of these problems faster for “large” circuit sizes implies a significant speed-up for “smaller” circuit sizes. Our general arguments work for a variety of models solving circuit-analysis problems, including non-uniform circuits and randomized models of computation. We derive striking consequences for the complexities of these problems, in both the fine-grained and parameterized setting. For example, we show that certain fine-grained improvements on the runtime exponents of polynomial-time versions of Circuit-SAT would imply subexponential-time algorithms for Circuit-SAT on 2o(n)-size circuits, refuting the Exponential Time Hypothesis. We also show that any algorithm for Circuit-SAT with k inputs and n gates running in 1000000k + n1+ε time (for all ε > 0) would imply algorithms running in time (1+ε)k + n1+ε time (for all ε > 0), also refuting the Exponential Time Hypothesis. Applying our ideas in the #Circuit-SAT setting, we prove new unconditional lower bounds against uniform circuits with symmetric gates for functions in deterministic linear time.en_US
dc.publisherACMen_US
dc.relation.isversionof10.1145/3618260.3649723en_US
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en_US
dc.sourceAssociation for Computing Machineryen_US
dc.titleSelf-Improvement for Circuit-Analysis Problemsen_US
dc.typeArticleen_US
dc.identifier.citationWilliams, R. Ryan. 2024. "Self-Improvement for Circuit-Analysis Problems."
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.mitlicensePUBLISHER_POLICY
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dc.date.updated2024-07-01T07:50:57Z
dc.language.rfc3066en
dc.rights.holderThe author(s)
dspace.date.submission2024-07-01T07:50:57Z
mit.licensePUBLISHER_POLICY
mit.metadata.statusAuthority Work and Publication Information Neededen_US


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