An Energy-Efficient 3D Point Neural Network Accelerator with Fine-grained LiDAR-SoC Pipeline Structure
Author(s)
Seo, Bokyoung; Jung, Jueun; Han, Donghyeon; Lee, Kyuho
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3D point neural network (PNN) segmentation using LiDAR data has emerged as a fundamental stage of high-level intelligence algorithms for autonomous applications such as SLAM, path planning, object detection, etc. However, previous processors were not feasible for real-time and low-power 3D PNN systems since they wasted ~100 ms of LiDAR's sensing time and required 107.3 mW of external memory access before PNN processing. Furthermore, their compute-intensive bin partitioning and point sampling methods were not suitable for large-scale outdoor data, causing significant computing power. Therefore, the entire system, from sensing to processing, must be taken into account for 3D PNN processor implementation. This paper proposes L-PNPU, an energy-efficient 3D PNN segmentation processor optimized with the unique mechanical characteristics of LiDAR. It is designed with three key features: 1) Azimuthal bin partitioning to reduce power and latency, 2) Modified PNN algorithm co-optimized with heterogeneous architecture to remove redundant operation and reduce energy, and 3) Fine-grained LiDAR-System-on-Chip (SoC) pipeline structure to enhance the system energy and throughput. At 250 MHz and 1.0V, L-PNPU achieves 1.27M points/s of throughput and 0.51 μJ/point of energy efficiency.
Description
ISLPED '24, August 5–7, 2024, Newport Beach, CA, USA
Date issued
2024-08-05Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer SciencePublisher
ACM|Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design
Citation
Seo, Bokyoung, Jung, Jueun, Han, Donghyeon and Lee, Kyuho. 2024. "An Energy-Efficient 3D Point Neural Network Accelerator with Fine-grained LiDAR-SoC Pipeline Structure."
Version: Final published version
ISBN
979-8-4007-0688-2
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