Show simple item record

dc.contributor.authorNasr-Esfahany, Arash
dc.contributor.authorAlizadeh, Mohammad
dc.contributor.authorLee, Victor
dc.contributor.authorAlam, Hanna
dc.contributor.authorCoon, Brett
dc.contributor.authorCuller, David
dc.contributor.authorDadu, Vidushi
dc.contributor.authorDixon, Martin
dc.contributor.authorLevy, Henry
dc.contributor.authorPandey, Santosh
dc.contributor.authorRanganathan, Parthasarathy
dc.contributor.authorYazdanbakhsh, Amir
dc.date.accessioned2025-09-16T19:47:10Z
dc.date.available2025-09-16T19:47:10Z
dc.date.issued2025-06-20
dc.identifier.isbn979-8-4007-1261-6
dc.identifier.urihttps://hdl.handle.net/1721.1/162664
dc.descriptionISCA ’25, Tokyo, Japanen_US
dc.description.abstractCycle-level simulators such as gem5 are widely used in microarchitecture design, but they are prohibitively slow for large-scale design space explorations. We present Concorde, a new methodology for learning fast and accurate performance models of microarchitectures. Unlike existing simulators and learning approaches that emulate each instruction, Concorde predicts the behavior of a program based on compact performance distributions that capture the impact of different microarchitectural components. It derives these performance distributions using simple analytical models that estimate bounds on performance induced by each microarchitectural component, providing a simple yet rich representation of a program’s performance characteristics across a large space of microarchitectural parameters. Experiments show that Concorde is more than five orders of magnitude faster than a reference cycle-level simulator, with about 2% average Cycles-Per-Instruction (CPI) prediction error across a range of SPEC, open-source, and proprietary benchmarks. This enables rapid design-space exploration and performance sensitivity analyses that are currently infeasible, e.g., in about an hour, we conducted a first-of-its-kind fine-grained performance attribution to different microarchitectural components across a diverse set of programs, requiring nearly 150 million CPI evaluations.en_US
dc.publisherACM|Proceedings of the 52nd Annual International Symposium on Computer Architectureen_US
dc.relation.isversionofhttps://doi.org/10.1145/3695053.3731037en_US
dc.rightsCreative Commons Attributionen_US
dc.rights.urihttps://creativecommons.org/licenses/by/4.0/en_US
dc.sourceAssociation for Computing Machineryen_US
dc.titleConcorde: Fast and Accurate CPU Performance Modeling with Compositional Analytical-ML Fusionen_US
dc.typeArticleen_US
dc.identifier.citationArash Nasr-Esfahany, Mohammad Alizadeh, Victor Lee, Hanna Alam, Brett W. Coon, David Culler, Vidushi Dadu, Martin Dixon, Henry M. Levy, Santosh Pandey, Parthasarathy Ranganathan, and Amir Yazdanbakhsh. 2025. Concorde: Fast and Accurate CPU Performance Modeling with Compositional Analytical-ML Fusion. In Proceedings of the 52nd Annual International Symposium on Computer Architecture (ISCA '25). Association for Computing Machinery, New York, NY, USA, 1480–1494.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.identifier.mitlicensePUBLISHER_POLICY
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dc.date.updated2025-08-01T07:56:20Z
dc.language.rfc3066en
dc.rights.holderThe author(s)
dspace.date.submission2025-08-01T07:56:21Z
mit.licensePUBLISHER_CC
mit.metadata.statusAuthority Work and Publication Information Neededen_US


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record