| dc.contributor.author | Strzeszynski, Jan | |
| dc.contributor.author | Tong, Jianming | |
| dc.contributor.author | Lee, Kyungmi | |
| dc.contributor.author | Xiong, Nathan | |
| dc.contributor.author | Parashar, Angshuman | |
| dc.contributor.author | Emer, Joel | |
| dc.contributor.author | Krishna, Tushar | |
| dc.contributor.author | Yan, Mengjia | |
| dc.date.accessioned | 2025-12-04T22:51:59Z | |
| dc.date.available | 2025-12-04T22:51:59Z | |
| dc.date.issued | 2025-10-18 | |
| dc.identifier.isbn | 979-8-4007-2198-4 | |
| dc.identifier.uri | https://hdl.handle.net/1721.1/164205 | |
| dc.description | HASP 2025, Seoul, Republic of Korea | en_US |
| dc.description.abstract | Off-chip memory in ML accelerators is vulnerable to both hardware
and software attack, which needs encryption and authentication.
Precise performance modeling of it requires (1) representation of
authentication blocks (AuthBlock) to cover the full design space of
shapes and orientations, and (2) precise memory behavior modeling,
as encryption and authentication mainly increase memory traffic.
This paper introduces 𝑆
2Loop, a framework that resolves these
challenges by introducing (1) flexible, all-level partitioning based
AuthBlocks for ensuring full coverage of the entire design space, (2)
a realistic layout-based memory model, and (3) an Mapping-LayoutAuthentication co-search algorithm to explore the drastic combinatorial design space to figure out optimal mapping, layout, and
AuthBlock shape choice for multi-layer workloads. SquareLoop’s
detailed memory model helps find better mapping to achieve 1.32×
speedup on ResNet18 compared to the SotA SecureLoop, and our
latency predictions are validated to within 7.3% of an RTL implementation. 𝑆
2𝐿𝑜𝑜𝑝 also achieve up-to 1.08×/1.82× overall speedup for
authenticated ResNet18/MobileNet-V3 on various accelerators with
AuthBlock and Mapping co-searching. We open-source 𝑆
2Loop to
provide a powerful and validated tool for designing efficient, secure
accelerators at https://github.com/maeri-project/squareloop. | en_US |
| dc.publisher | ACM|Hardware and Architectural Support for Security and Privacy 2025 | en_US |
| dc.relation.isversionof | https://doi.org/10.1145/3768725.3768732 | en_US |
| dc.rights | Creative Commons Attribution | en_US |
| dc.rights.uri | https://creativecommons.org/licenses/by/4.0/ | en_US |
| dc.source | Association for Computing Machinery | en_US |
| dc.title | SquareLoop: Explore Optimal Authentication Block Strategy for ML | en_US |
| dc.type | Article | en_US |
| dc.identifier.citation | Jan Strzeszynski, Jianming Tong, Kyungmi Lee, Nathan Xiong, Angshuman Parashar, Joel S. Emer, Tushar Krishna, and Mengjia Yan. 2025. SquareLoop: Explore Optimal Authentication Block Strategy for ML. In Proceedings of the 14th International Workshop on Hardware and Architectural Support for Security and Privacy (HASP '25). Association for Computing Machinery, New York, NY, USA, 37–45. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Research Laboratory of Electronics | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Mathematics | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
| dc.identifier.mitlicense | PUBLISHER_CC | |
| dc.eprint.version | Final published version | en_US |
| dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
| eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
| dc.date.updated | 2025-11-01T07:58:12Z | |
| dc.language.rfc3066 | en | |
| dc.rights.holder | The author(s) | |
| dspace.date.submission | 2025-11-01T07:58:13Z | |
| mit.license | PUBLISHER_CC | |
| mit.metadata.status | Authority Work and Publication Information Needed | en_US |