Now showing items 247-249 of 1152

    • Virtual Wires: Overcoming Pin Limitations in FPGA-based Logic Emulation 

      Babb, Jonathan William (1993-11)
      Existing FPGA-based logic emulators are limited by inter-chip communication bandwidth, resulting in low gate utilization (10 to 20 percent of usable gates). This resource imbalance increases the number of chips needed to ...
    • Reordering with Hindsight 

      Spiers, Bradford T. (1993-10)
      This report presents the reordering technique for parallel debugging. This technique is useful for debugging ordering errors, caused when actions a programmer meant to occur in a specific order occur in a different, ...
    • Self-stabilization By Local Checking and Correction 

      Varghese, George (1992-10)
      A self-stabilizing protocol begins to behave correctly in bounded time, no matter what state it starts in. Self-stabilization abstracts the ability to tolerate arbitrary faults that stop. This thesis describes a simple ...