Designing manycore processor networks using silicon photonics

Author(s)
Stojanovic, Vladimir Marko; Shamim, Imran; Batten, Christopher; Joshi, Ajay J.; Kwon, Yong-Jin; ... Show more
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Abstract
We present a vertical integration approach for designing silicon photonic networks for communication in manycore systems. Using a top-down approach we project the photonic device requirements for a 64-tile system designed in 22 nm technology.
Date issued
2009-12
URI
http://hdl.handle.net/1721.1/59427
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science; Massachusetts Institute of Technology. Research Laboratory of Electronics
Journal
LEOS Annual Meeting Conference Proceedings, 2009. LEOS '09. IEEE
Publisher
Institute of Electrical and Electronics Engineers
Citation
Joshi, A. et al. “Designing manycore processor networks using silicon photonics.” LEOS Annual Meeting Conference Proceedings, 2009. LEOS '09. IEEE. 2009. 16-17. ©2009 Institute of Electrical and Electronics Engineers.
Version: Final published version
Other identifiers
INSPEC Accession Number: 11000617
ISBN
978-1-4244-3680-4
ISSN
1092-8081
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