Photonic integration in a commercial scaled bulk-CMOS process
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We demonstrate the first photonic chip designed for a commercial bulk CMOS process (65 nm-node) using standard process layers combined with post-processing, enabling dense photonic integration with high-performance microprocessor electronics.
Date issued
2009-11Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science; Massachusetts Institute of Technology. Research Laboratory of ElectronicsJournal
International Conference on Photonics in Switching, 2009. PS '09
Publisher
Institute of Electrical and Electronics Engineers
Citation
Orcutt, J.S. et al. “Photonic integration in a commercial scaled bulk-CMOS process.” Photonics in Switching, 2009. PS '09. International Conference on. 2009. 1-2. © 2009 IEEE.
Version: Final published version
Other identifiers
INSPEC Accession Number: 10963482
ISBN
978-1-4244-3857-0