CMOS photonic processor-memory networks

Author(s)
Stojanovic, Vladimir Marko; Joshi, Ajay J.; Batten, Christopher; Kwon, Yong-Jin; Beamer, Scott; ... Show more
Thumbnail
DownloadStojanovic-2010-CMOS photonic processor-memory networks.pdf (796.6Kb)
PUBLISHER_POLICY
Terms of use
Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Metadata
Show full item record
Abstract
This paper presents a monolithically integrated dense WDM photonic network for manycore processors, optimized for loss and power footprint of optical components, which can achieve up to 10x better energy-efficiency and throughput than electrical interconnects.
Date issued
2010-02
URI
http://hdl.handle.net/1721.1/61782
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Journal
Photonics Society Winter Topicals Meeting Series (WTM), 2010 IEEE
Publisher
Institute of Electrical and Electronics Engineers
Citation
Stojanovic, V. et al. “CMOS photonic processor-memory networks.” Photonics Society Winter Topicals Meeting Series (WTM), 2010 IEEE. 2010. 118-119. © Copyright 2010 IEEE
Version: Final published version
Other identifiers
INSPEC Accession Number: 11153931
ISBN
978-1-4244-5240-8
Collections