ORION 2.0: A Power-Area Simulator for Interconnection Networks

Author(s)
Kahng, Andrew B.; Li, Bin; Peh, Li-Shiuan; Samadi, Kambiz
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Abstract
As industry moves towards multicore chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constraint, early-stage estimation of NoC power has become crucially important. In this work, we present ORION 2.0, an enhanced NoC power and area simulator, which offers significant accuracy improvement relative to its predecessor, ORION 1.0.
Date issued
2011-03
URI
http://hdl.handle.net/1721.1/67492
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Publisher
Institute of Electrical and Electronics Engineers
Citation
Kahng, Andrew B. et al. “ORION 2.0: A Power-Area Simulator for Interconnection Networks.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2011): n. pag. Web. 9 Dec. 2011.
Version: Author's final manuscript
ISSN
1063-8210
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