dc.contributor.author | El-Moselhy, Tarek Ali | |
dc.contributor.author | Elfadel, Ibrahim M. | |
dc.contributor.author | Daniel, Luca | |
dc.date.accessioned | 2012-02-01T20:15:24Z | |
dc.date.available | 2012-02-01T20:15:24Z | |
dc.date.issued | 2011-01 | |
dc.date.submitted | 2010-10 | |
dc.identifier.issn | 1521-3323 | |
dc.identifier.issn | 1557-9980 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/68998 | |
dc.description.abstract | In this paper, we propose a hierarchical algorithm to compute the 3-D capacitances of a large number of topologically different layout configurations that are all assembled from the same basic layout motifs. Our algorithm uses the boundary element method in order to compute a Markov transition matrix (MTM) for each motif. The individual motifs are connected together by building a large Markov chain. Such Markov chain can be simulated extremely efficiently using Monte Carlo simulations (e.g., random walks). The main practical advantage of the proposed algorithm is its ability to extract the capacitance of a large number of layout configurations in a complexity that is basically independent of the number of configurations. For instance, in a large 3-D layout example, the capacitance calculation of 1000 different configurations assembled from the same motifs is accomplished in the time required to solve independently two configurations, i.e., a 500 × speedup. | en_US |
dc.description.sponsorship | Mentor Graphics (Firm) | en_US |
dc.description.sponsorship | Advanced Micro Devices (Firm) | en_US |
dc.description.sponsorship | International Business Machines Corporation | en_US |
dc.description.sponsorship | Semiconductor Research Corporation | en_US |
dc.description.sponsorship | Interconnect Focus Center (United States. Defense Advanced Research Projects Agency and Semiconductor Research Corporation) | en_US |
dc.language.iso | en_US | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/tadvp.2010.2091504 | en_US |
dc.rights | Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. | en_US |
dc.source | IEEE | en_US |
dc.title | A Markov Chain Based Hierarchical Algorithm for Fabric-Aware Capacitance Extraction | en_US |
dc.type | Article | en_US |
dc.identifier.citation | El-Moselhy, T, I M Elfadel, and L Daniel. “A Markov Chain Based Hierarchical Algorithm for Fabric-Aware Capacitance Extraction.” IEEE Transactions on Advanced Packaging 33.4 (2010): 818-827. Web. 1 Feb. 2012. © 2011 Institute of Electrical and Electronics Engineers | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Aeronautics and Astronautics | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.approver | Daniel, Luca | |
dc.contributor.mitauthor | El-Moselhy, Tarek Ali | |
dc.contributor.mitauthor | Elfadel, Ibrahim M. | |
dc.contributor.mitauthor | Daniel, Luca | |
dc.relation.journal | IEEE Transactions on Advanced Packaging | en_US |
dc.eprint.version | Final published version | en_US |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
dspace.orderedauthors | El-Moselhy, T; Elfadel, I M; Daniel, L | en |
dc.identifier.orcid | https://orcid.org/0000-0002-5880-3151 | |
dspace.mitauthor.error | true | |
mit.license | PUBLISHER_POLICY | en_US |
mit.metadata.status | Complete | |