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Effect of trapping on the critical voltage for degradation in gan high electron mobility transistors

Author(s)
Demirtas, Sefa; del Alamo, Jesus A.
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Abstract
We have performed V[subscript DS] = 0 V and OFF-state step-stress experiments on GaN-on-Si and GaN-on-SiC high electron mobility transistors under UV illumination and in the dark. We have found that for both stress conditions, UV illumination decreases the critical voltage for the onset of degradation in gate current in GaN-on-Si HEMTs in a pronounced way, but no such decrease is observed on SiC. This difference is attributed to UV-induced electron detrapping, which results in an increase in the electric field and, through the inverse piezoelectric effect, in the mechanical stress in the AlGaN barrier of the device. Due to the large number of traps in GaN-on-Si, this effect is clearer and more prominent than in GaN-on-SiC, which contains fewer traps in the fresh state.
Date issued
2010-06
URI
http://hdl.handle.net/1721.1/71581
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science; Massachusetts Institute of Technology. Microsystems Technology Laboratories
Journal
Proceedings of the IEEE International Reliability Physics Symposium (IRPS), 2010
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Demirtas, Sefa, and Jesus A. del Alamo. “Effect of trapping on the critical voltage for degradation in GaN high electron mobility transistors.” IEEE, 2010. 134-138.
Version: Author's final manuscript
Other identifiers
INSPEC Accession Number: 11500973
ISSN
1541-7026
978-1-4244-5430-3

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