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dc.contributor.authorDemaine, Erik D.
dc.contributor.authorZadimoghaddam, Morteza
dc.date.accessioned2012-09-10T14:53:19Z
dc.date.available2012-09-10T14:53:19Z
dc.date.issued2010-06
dc.identifier.isbn978-1-4503-0079-7
dc.identifier.urihttp://hdl.handle.net/1721.1/72589
dc.description.abstractWe develop logarithmic approximation algorithms for extremely general formulations of multiprocessor multi-interval offline task scheduling to minimize power usage. Here each processor has an arbitrary specified power consumption to be turned on for each possible time interval, and each job has a specified list of time interval/processor pairs during which it could be scheduled. (A processor need not be in use for an entire interval it is turned on.) If there is a feasible schedule, our algorithm finds a feasible schedule with total power usage within an O(log n) factor of optimal, where n is the number of jobs.(Even in a simple setting with one processor, the problem is Set-Cover hard.) If not all jobs can be scheduled and each job has a specified value, then our algorithm finds a schedule of value at least (1-ε) Z and power usage within an O(log(1/ε)) factor of the optimal schedule of value at least Z, for any specified Z and ε > 0. At the foundation of our work is a general framework for logarithmic approximation to maximizing any submodular function subject to budget constraints.en_US
dc.language.isoen_US
dc.publisherAssociation for Computing Machinery (ACM)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1145/1810479.1810483en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alike 3.0en_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/3.0/en_US
dc.sourceMIT web domainen_US
dc.titleScheduling to Minimize Power Consumption using Submodular Functionsen_US
dc.typeArticleen_US
dc.identifier.citationErik D. Demaine and Morteza Zadimoghaddam. 2010. Scheduling to minimize power consumption using submodular functions. In Proceedings of the 22nd ACM symposium on Parallelism in algorithms and architectures (SPAA '10). ACM, New York, NY, USA, 21-29.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.approverDemaine, Erik D.
dc.contributor.mitauthorDemaine, Erik D.
dc.contributor.mitauthorZadimoghaddam, Morteza
dc.relation.journalProceedings of the 22nd ACM Symposium on Parallelism in Algorithms and Architectures (SPAA '10)en_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
dspace.orderedauthorsDemaine, Erik D.; Zadimoghaddam, Mortezaen
dc.identifier.orcidhttps://orcid.org/0000-0003-3803-5703
mit.licenseOPEN_ACCESS_POLICYen_US
mit.metadata.statusComplete


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