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dc.contributor.authorVamvakos, Socrates D.
dc.contributor.authorStojanovic, Vladimir Marko
dc.contributor.authorNikolic, Borivoje
dc.date.accessioned2012-10-18T20:55:33Z
dc.date.available2012-10-18T20:55:33Z
dc.date.issued2009-10
dc.date.submitted2009-09
dc.identifier.isbn978-1-4244-4073-3
dc.identifier.isbn978-1-4244-4071-9
dc.identifier.urihttp://hdl.handle.net/1721.1/74124
dc.description.abstractTiming jitter is one of the most significant phase-locked loop characteristics, with high impact on performance in a range of applications. It is, therefore, important to develop the tools necessary to study and predict PLL jitter performance at design time. In this paper a discrete-time, linear, cyclostationary PLL model for jitter analysis is proposed, which accounts for the cyclostationary nature of noise injected into the loop at various PLL components. The model also predicts the aliasing of jitter due to the downsampling and upsampling of frequencies around the PLL loop. Closed-form expressions are derived for the output jitter spectrum and match well with results of event-driven simulations of a 3[superscript rd]-order PLL.en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/CICC.2009.5280745en_US
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en_US
dc.sourceIEEEen_US
dc.titleDiscrete-time, cyclostationary phase-locked loop model for jitter analysisen_US
dc.typeArticleen_US
dc.identifier.citationVamvakos, Socrates D., Vladimir Stojanovic, and Borivoje Nikolic. “Discrete-time, Cyclostationary Phase-locked Loop Model for Jitter Analysis.” IEEE, 2009. 637–640. © 2012 IEEEen_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.mitauthorStojanovic, Vladimir Marko
dc.relation.journalProceedings of the Custom Integrated Circuits Conference, 2009en_US
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
dspace.orderedauthorsVamvakos, Socrates D.; Stojanovic, Vladimir; Nikolic, Borivojeen
mit.licensePUBLISHER_POLICYen_US


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