Design-space exploration for CMOS photonic processor networks

Author(s)
Stojanovic, Vladimir Marko; Joshi, Ajay J.; Batten, Christopher; Kwon, Yong-Jin; Beamer, Scott; ... Show more
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Abstract
Monolithically integrated dense WDM photonic network topologies optimized for loss and power footprint of optical components can achieve up to 4x better energy-efficiency and throughput than electrical interconnects in core-to-core, and 10x in core-to-DRAM networks.
Date issued
2010-05
URI
http://hdl.handle.net/1721.1/74149
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Journal
Proceedings of the Conference on (OFC/NFOEC) Optical Fiber Communication (OFC), collocated National Fiber Optic Engineers Conference, 2010
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
"Design-space exploration for CMOS photonic processor networks." Conference on (OFC/NFOEC) Optical Fiber Communication (OFC), collocated National Fiber Optic Engineers Conference, 2010. ©2010 IEEE
Version: Final published version
ISBN
978-1-55752-884-1
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