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Now showing items 151-160 of 204
The design and evaluation of a virtual trusted advisor
(Massachusetts Institute of Technology, 2002)
A virtual machine for a type-[omega] denotational proof language
(Massachusetts Institute of Technology, 2002)
Real-time scheduling for Java
(Massachusetts Institute of Technology, 2002)
A low noise, low power DC/DC converter for cell phone power applications
(Massachusetts Institute of Technology, 2002)
Distributed algorithms for self-disassembly in modular robots
(Massachusetts Institute of Technology, 2006)
We developed a modular robotic system that behaves as programmable matter. Specifically, we designed, implemented, and tested a collection of robots that, starting from an amorphous arrangement, can be assembled into ...
Age differentiation of rat smooth muscle cells : altered proliferation profile, cellular changes, and implications for atherosclerotic plaque destabilization
(Massachusetts Institute of Technology, 2004)
Clinical evidence has shown that the elderly are at a higher risk for atherosclerotic plaque destabilization. The effect of aging on smooth muscle cells, a major cell type in the plaque, is central to the process of disease ...
Visual frets for a free-gesture musical interface
(Massachusetts Institute of Technology, 2001)
Improved handling of the decoding operation in the Presto compiler
(Massachusetts Institute of Technology, 2004)
This thesis presents a research project on decoder related optimizations in HDL de- signs. The goal of the research is to improve design synthesis quality-of-result, mainly in terms of area; this involves sharing decoders ...
A programming environment for on-demand service overlays
(Massachusetts Institute of Technology, 2004)
Recent years have seen a growing interest in overlay networks. Overlay networks simplify the complications of creating and connecting distributed applications on the network by optimizing the underlying IP routing architecture. ...
High speed DSP implementation in run-time partially reconfigurable FPGAs
(Massachusetts Institute of Technology, 2003)
This thesis investigates the feasibility of utilizing a run-time partially reconfigurable FPGA to implement a sequence of high-speed digital signal processing filters. Rather than reconfiguring the entire device to modify ...