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dc.contributor.authorPhinney, Joshua W.
dc.contributor.authorPerreault, David J.
dc.contributor.authorLang, Jeffrey H.
dc.date.accessioned2014-05-22T19:06:02Z
dc.date.available2014-05-22T19:06:02Z
dc.date.issued2007-07
dc.date.submitted2006-11
dc.identifier.issn0885-8993
dc.identifier.otherINSPEC Accession Number: 9605936
dc.identifier.urihttp://hdl.handle.net/1721.1/87108
dc.description.abstractTransmission lines and their lumped approximating networks have long been incorporated into radio-frequency power amplifiers to improve efficiency and shape circuit waveforms and are beginning to perform a similar roles in high-frequency switched-mode power electronics. Though lumped line-simulating networks are often preferred to their distributed exemplars for reasons of design flexibility and manufacturability, the impedance peaks and nulls of such lumped networks must be aligned in a precise, harmonic manner to minimize loss and symmetrize converter waveforms. This paper addresses the issue of harmonic frequency alignment in line-simulating networks, presenting new analytic results for predicting the impedance-minimum and impedance-maximum frequencies of networks in a ladder form. Two means of correcting for the observed harmonic misalignment in practical structures will be presented, corroborated by measurements of laminar structures built into the thickness of printed-circuit boards. These structures comprise inductances and capacitances whose dimensions are largely decoupled, such that the simulated line can be accurately analyzed and designed on a lumped basis. The presented techniques will be placed within a power-electronics setting by a representative application incorporating a lumped, line-simulating network.en_US
dc.description.sponsorshipNational Science Foundation (U.S.) (NSF Award 0401278)en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/TPEL.2007.900530en_US
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en_US
dc.sourceVabulasen_US
dc.titleSynthesis of Lumped Transmission-Line Analogsen_US
dc.typeArticleen_US
dc.identifier.citationPhinney, Joshua W., David J. Perreault, and Jeffrey H. Lang. “Synthesis of Lumped Transmission-Line Analogs.” IEEE Trans. Power Electron. 22, no. 4 (n.d.): 1531–1542.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.approverPerreault, David J.en_US
dc.contributor.mitauthorPerreault, David J.en_US
dc.contributor.mitauthorLang, Jeffrey H.en_US
dc.relation.journalIEEE Transactions on Power Electronicsen_US
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
eprint.statushttp://purl.org/eprint/status/PeerRevieweden_US
dspace.orderedauthorsPhinney, Joshua W.; Perreault, David J.; Lang, Jeffrey H.en_US
dc.identifier.orcidhttps://orcid.org/0000-0002-5765-4369
dc.identifier.orcidhttps://orcid.org/0000-0002-0746-6191
mit.licensePUBLISHER_POLICYen_US
mit.metadata.statusComplete


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