| dc.contributor.author | Phinney, Joshua W. | |
| dc.contributor.author | Perreault, David J. | |
| dc.contributor.author | Lang, Jeffrey H. | |
| dc.date.accessioned | 2014-05-22T19:06:02Z | |
| dc.date.available | 2014-05-22T19:06:02Z | |
| dc.date.issued | 2007-07 | |
| dc.date.submitted | 2006-11 | |
| dc.identifier.issn | 0885-8993 | |
| dc.identifier.other | INSPEC Accession Number: 9605936 | |
| dc.identifier.uri | http://hdl.handle.net/1721.1/87108 | |
| dc.description.abstract | Transmission lines and their lumped approximating networks have long been incorporated into radio-frequency power amplifiers to improve efficiency and shape circuit waveforms and are beginning to perform a similar roles in high-frequency switched-mode power electronics. Though lumped line-simulating networks are often preferred to their distributed exemplars for reasons of design flexibility and manufacturability, the impedance peaks and nulls of such lumped networks must be aligned in a precise, harmonic manner to minimize loss and symmetrize converter waveforms. This paper addresses the issue of harmonic frequency alignment in line-simulating networks, presenting new analytic results for predicting the impedance-minimum and impedance-maximum frequencies of networks in a ladder form. Two means of correcting for the observed harmonic misalignment in practical structures will be presented, corroborated by measurements of laminar structures built into the thickness of printed-circuit boards. These structures comprise inductances and capacitances whose dimensions are largely decoupled, such that the simulated line can be accurately analyzed and designed on a lumped basis. The presented techniques will be placed within a power-electronics setting by a representative application incorporating a lumped, line-simulating network. | en_US |
| dc.description.sponsorship | National Science Foundation (U.S.) (NSF Award 0401278) | en_US |
| dc.language.iso | en_US | |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
| dc.relation.isversionof | http://dx.doi.org/10.1109/TPEL.2007.900530 | en_US |
| dc.rights | Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. | en_US |
| dc.source | Vabulas | en_US |
| dc.title | Synthesis of Lumped Transmission-Line Analogs | en_US |
| dc.type | Article | en_US |
| dc.identifier.citation | Phinney, Joshua W., David J. Perreault, and Jeffrey H. Lang. “Synthesis of Lumped Transmission-Line Analogs.” IEEE Trans. Power Electron. 22, no. 4 (n.d.): 1531–1542. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
| dc.contributor.approver | Perreault, David J. | en_US |
| dc.contributor.mitauthor | Perreault, David J. | en_US |
| dc.contributor.mitauthor | Lang, Jeffrey H. | en_US |
| dc.relation.journal | IEEE Transactions on Power Electronics | en_US |
| dc.eprint.version | Final published version | en_US |
| dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
| eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
| dspace.orderedauthors | Phinney, Joshua W.; Perreault, David J.; Lang, Jeffrey H. | en_US |
| dc.identifier.orcid | https://orcid.org/0000-0002-5765-4369 | |
| dc.identifier.orcid | https://orcid.org/0000-0002-0746-6191 | |
| mit.license | PUBLISHER_POLICY | en_US |
| mit.metadata.status | Complete | |