Show simple item record

dc.contributor.authorSze, Vivienne
dc.contributor.authorBudagavi, Madhukar
dc.date.accessioned2015-02-06T13:52:01Z
dc.date.available2015-02-06T13:52:01Z
dc.date.issued2013-10
dc.identifier.isbn978-1-4673-6238-2
dc.identifier.issn2162-3562
dc.identifier.urihttp://hdl.handle.net/1721.1/93882
dc.description.abstractThe CABAC entropy coding engine is a well known throughput bottleneck in the AVC/H.264 video codec. It was redesigned to achieve higher throughput for the latest video coding standard HEVC/H.265. Various improvements were made including reduction in context coded bins, reduction in total bins and grouping of bypass bins. This paper discusses and quantifies the impact of these techniques and introduces a new metric called Bjontegaard delta cycles (BD-cycle) to compare the CABAC throughput of HEVC vs. AVC. BD-cycle uses the Bjontegaard delta measurement method to compute the average difference between the cycles vs. bit-rate curves of HEVC and AVC. This metric is useful for estimating the throughput of an HEVC CABAC engine from an existing AVC CABAC design for a given bit-rate. Under the common conditions set by the JCT-VC standardization body, HEVC CABAC has an average BD-cycle reduction of 31.1% for all intra, 24.3% for low delay, and 25.9% for random ac-cess, when processing up to 8 bypass bins per cycle.en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/SiPS.2013.6674499en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceProf. Sze via Chris Sherratten_US
dc.titleA comparison of CABAC throughput for HEVC/H.265 VS. AVC/H.264en_US
dc.typeArticleen_US
dc.identifier.citationSze, Vivienne, and Madhukar Budagavi. “A Comparison of CABAC Throughput for HEVC/H.265 VS. AVC/H.264.” SiPS 2013 Proceedings (October 2013).en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.approverSze, Vivienneen_US
dc.contributor.mitauthorSze, Vivienneen_US
dc.relation.journal2013 IEEE Workshops on Signal Processing Systems (SiPS)en_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
eprint.statushttp://purl.org/eprint/status/PeerRevieweden_US
dspace.orderedauthorsSze, Vivienne; Budagavi, Madhukaren_US
dc.identifier.orcidhttps://orcid.org/0000-0003-4841-3990
mit.licenseOPEN_ACCESS_POLICYen_US
mit.metadata.statusComplete


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record