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dc.contributor.authorChen, Kailiang
dc.contributor.authorChandrakasan, Anantha P.
dc.contributor.authorSodini, Charles G.
dc.date.accessioned2015-02-06T15:48:00Z
dc.date.available2015-02-06T15:48:00Z
dc.date.issued2012-11
dc.identifier.isbn978-1-4673-2771-8
dc.identifier.urihttp://hdl.handle.net/1721.1/93891
dc.description.abstractA four-channel analog front-end (AFE) transceiver chip for medical ultrasound imaging is demonstrated. The high voltage transmitter uses a 3-level pulse-shaping technique to deliver over 50% more acoustic power for the same power dissipation, compared to traditional methods. The design requires minimum off-chip components and is scalable for more channels. The receiver is implemented with a transimpedance amplifier (TIA) topology and is optimized for noise, bandwidth and power dissipation. Based on both acoustic and electrical measurements, we demonstrate the Transmitter (Tx) efficiency improvement, Tx beamformation and the pulse-echo response, revealing the system's full functionality.en_US
dc.description.sponsorshipSemiconductor Research Corporation. Focus Center for Circuit and System Solutions (C2S2)en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/IPEC.2012.6522653en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceChandrakasanen_US
dc.titleUltrasonic imaging front-end design for CMUT: A 3-level 30Vpp pulse-shaping pulser with improved efficiency and a noise-optimized receiveren_US
dc.typeArticleen_US
dc.identifier.citationChen, Kailiang, Anantha P. Chandrakasan, and Charles G. Sodini. “Ultrasonic Imaging Front-End Design for CMUT: A 3-Level 30Vpp Pulse-Shaping Pulser with Improved Efficiency and a Noise-Optimized Receiver.” 2012 IEEE Asian Solid State Circuits Conference (A-SSCC) (December 2012).en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.approverChandrakasan, Anantha P.en_US
dc.contributor.mitauthorChen, Kailiangen_US
dc.contributor.mitauthorChandrakasan, Anantha P.en_US
dc.contributor.mitauthorSodini, Charles G.en_US
dc.relation.journalProceedings of the 2012 IEEE Asian Solid State Circuits Conference (A-SSCC)en_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dspace.orderedauthorsChen, Kailiang; Chandrakasan, Anantha P.; Sodini, Charles G.en_US
dc.identifier.orcidhttps://orcid.org/0000-0002-0413-8774
dc.identifier.orcidhttps://orcid.org/0000-0002-5977-2748
mit.licenseOPEN_ACCESS_POLICYen_US
mit.metadata.statusComplete


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