dc.contributor.author | El-Damak, Dina Reda | |
dc.contributor.author | Bandyopadhyay, Saurav | |
dc.contributor.author | Chandrakasan, Anantha P. | |
dc.date.accessioned | 2015-02-19T19:46:51Z | |
dc.date.available | 2015-02-19T19:46:51Z | |
dc.date.issued | 2013-02 | |
dc.identifier.isbn | 978-1-4673-4516-3 | |
dc.identifier.isbn | 978-1-4673-4515-6 | |
dc.identifier.isbn | 978-1-4673-4514-9 | |
dc.identifier.issn | 0193-6530 | |
dc.identifier.other | INSPEC Accession Number: 13413790 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/95416 | |
dc.description.abstract | Dynamic Voltage Scaling (DVS) has become one of the standard techniques for energy efficient operation of systems by powering circuit blocks at the minimum voltage that meets the desired performance [1]. Switched Capacitor (SC) DC-DC converters have gained significant interest as a promising candidate for an integrated energy conversion solution that eliminates the need for inductors [2,3]. However, SC converters efficiency is limited by the conduction loss, bottom plate parasitic capacitance, gate drive loss in addition to the overhead of the control circuit. Reconfigurable SC converters supporting multi-gain settings have been proposed to allow efficient operation across wide output range [2,4]. Also, High density deep trench capacitors with low bottom plate parasitic capacitance have been utilized in [5] achieving a peak efficiency of 90%. In this work, we exploit on-chip ferroelectric capacitors (Fe-Caps) for charge transfer owing to their high density and extremely low bottom plate parasitic capacitance [6]. High efficiency conversion is achieved by combining the Fe-Caps with multi-gain setting converter in a reconfigurable architecture with dynamic gain selection. | en_US |
dc.language.iso | en_US | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/ISSCC.2013.6487776 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | Chandrakasan | en_US |
dc.title | A 93% efficiency reconfigurable switched-capacitor DC-DC converter using on-chip ferroelectric capacitors | en_US |
dc.type | Article | en_US |
dc.identifier.citation | El-Damak, D., S. Bandyopadhyay, and A. P. Chandrakasan. “A 93% Efficiency Reconfigurable Switched-Capacitor DC-DC Converter Using on-Chip Ferroelectric Capacitors.” 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (February 17-21, 2013), San Francisco, CA. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.approver | Chandrakasan, Anantha P. | en_US |
dc.contributor.mitauthor | El-Damak, Dina Reda | en_US |
dc.contributor.mitauthor | Bandyopadhyay, Saurav | en_US |
dc.contributor.mitauthor | Chandrakasan, Anantha P. | en_US |
dc.relation.journal | 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dspace.orderedauthors | El-Damak, D.; Bandyopadhyay, S.; Chandrakasan, A. P. | en_US |
dc.identifier.orcid | https://orcid.org/0000-0002-5977-2748 | |
dc.identifier.orcid | https://orcid.org/0000-0002-1242-6768 | |
dc.identifier.orcid | https://orcid.org/0000-0002-6739-269X | |
mit.license | OPEN_ACCESS_POLICY | en_US |
mit.metadata.status | Complete | |