A 0.6V 2.9µW mixed-signal front-end for ECG monitoring
Author(s)Yip, Marcus; Bohorquez, Jose L.; Chandrakasan, Anantha P.
MetadataShow full item record
This paper presents a mixed-signal ECG front-end that uses aggressive voltage scaling to maximize power-efficiency and facilitate integration with low-voltage DSPs. 50/60Hz interference is canceled using mixed-signal feedback, enabling ultra-low-voltage operation by reducing dynamic range requirements. Analog circuits are optimized for ultra-low-voltage, and a SAR ADC with a dual-DAC architecture eliminates the need for a power-hungry ADC buffer. Oversampling and ΔΣ-modulation leveraging near-V[subscript T] digital processing are used to achieve ultra-low-power operation without sacrificing noise performance and dynamic range. The fully-integrated front-end is implemented in a 0.18μm CMOS process and consumes 2.9μW from 0.6V.
DepartmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Proceedings of the 2012 Symposium on VLSI Circuits (VLSIC)
Institute of Electrical and Electronics Engineers (IEEE)
Yip, Marcus, Jose L. Bohorquez, and Anantha P. Chandrakasan. “A 0.6V 2.9µW Mixed-Signal Front-End for ECG Monitoring.” 2012 Symposium on VLSI Circuits (VLSIC) (June 2012).
Author's final manuscript