dc.contributor.author | Agarwal, Sapan | |
dc.contributor.author | Teherani, James T. | |
dc.contributor.author | Hoyt, Judy L. | |
dc.contributor.author | Antoniadis, Dimitri A. | |
dc.contributor.author | Yablonovitch, Eli | |
dc.date.accessioned | 2015-11-05T13:25:47Z | |
dc.date.available | 2015-11-05T13:25:47Z | |
dc.date.issued | 2014-04 | |
dc.date.submitted | 2014-03 | |
dc.identifier.issn | 0018-9383 | |
dc.identifier.issn | 1557-9646 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/99724 | |
dc.description.abstract | The electron-hole (EH) bilayer tunneling field-effect transistor promises to eliminate heavy-doping band tails enabling a smaller subthreshold swing voltage. Nevertheless, the electrostatics of a thin structure must be optimized for gate efficiency. We analyze the tradeoff between gate efficiency versus ON-state conductance to find the optimal device design. Once the EH bilayer is optimized for a given ON-state conductance, Si, Ge, and InAs all have similar gate efficiency, around 40%-50%. Unlike Si and Ge, only the InAs case allows a manageable work function difference for EH bilayer transistor operation. | en_US |
dc.description.sponsorship | National Science Foundation (U.S.). Center for Energy Efficient Electronics Science (Award 0939514) | en_US |
dc.language.iso | en_US | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/TED.2014.2312939 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | Other univ. web domain | en_US |
dc.title | Engineering the Electron-Hole Bilayer Tunneling Field-Effect Transistor | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Agarwal, Sapan, James T. Teherani, Judy L. Hoyt, Dimitri A. Antoniadis, and Eli Yablonovitch. “Engineering the Electron-Hole Bilayer Tunneling Field-Effect Transistor.” IEEE Transactions on Electron Devices 61, no. 5 (May 2014): 1599–1606. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Microsystems Technology Laboratories | en_US |
dc.contributor.mitauthor | Teherani, James T. | en_US |
dc.contributor.mitauthor | Hoyt, Judy L. | en_US |
dc.contributor.mitauthor | Antoniadis, Dimitri A. | en_US |
dc.relation.journal | IEEE Transactions on Electron Devices | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
dspace.orderedauthors | Agarwal, Sapan; Teherani, James T.; Hoyt, Judy L.; Antoniadis, Dimitri A.; Yablonovitch, Eli | en_US |
dc.identifier.orcid | https://orcid.org/0000-0002-7778-8073 | |
dc.identifier.orcid | https://orcid.org/0000-0002-4836-6525 | |
mit.license | OPEN_ACCESS_POLICY | en_US |
mit.metadata.status | Complete | |