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dc.contributor.authorZhang, Zheng
dc.contributor.authorYang, Xiu
dc.contributor.authorMarucci, Giovanni
dc.contributor.authorMaffezzoni, Paolo
dc.contributor.authorElfadel, Ibrahim Abe M.
dc.contributor.authorKarniadakis, George E.
dc.contributor.authorDaniel, Luca
dc.date.accessioned2015-11-20T15:59:20Z
dc.date.available2015-11-20T15:59:20Z
dc.date.issued2014-09
dc.identifier.isbn978-1-4799-3286-3
dc.identifier.urihttp://hdl.handle.net/1721.1/99953
dc.description.abstractProcess variations are a major concern in today's chip design since they can significantly degrade chip performance. To predict such degradation, existing circuit and MEMS simulators rely on Monte Carlo algorithms, which are typically too slow. Therefore, novel fast stochastic simulators are highly desired. This paper first reviews our recently developed stochastic testing simulator that can achieve speedup factors of hundreds to thousands over Monte Carlo. Then, we develop a fast hierarchical stochastic spectral simulator to simulate a complex circuit or system consisting of several blocks. We further present a fast simulation approach based on anchored ANOVA (analysis of variance) for some design problems with many process variations. This approach can reduce the simulation cost and can identify which variation sources have strong impacts on the circuit's performance. The simulation results of some circuit and MEMS examples are reported to show the effectiveness of our simulator.en_US
dc.description.sponsorshipMIT-Skolkovo Institute of Science and Technology Programen_US
dc.description.sponsorshipMIT-Rocca Seed Funden_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/CICC.2014.6946009en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourcearXiven_US
dc.titleStochastic testing simulator for integrated circuits and MEMS: Hierarchical and sparse techniquesen_US
dc.typeArticleen_US
dc.identifier.citationZhang, Zheng, Xiu Yang, Giovanni Marucci, Paolo Maffezzoni, Ibrahim Abe M. Elfadel, George Karniadakis, and Luca Daniel. “Stochastic Testing Simulator for Integrated Circuits and MEMS: Hierarchical and Sparse Techniques.” Proceedings of the IEEE 2014 Custom Integrated Circuits Conference (September 2014).en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.departmentMassachusetts Institute of Technology. Research Laboratory of Electronicsen_US
dc.contributor.mitauthorZhang, Zhengen_US
dc.contributor.mitauthorDaniel, Lucaen_US
dc.relation.journalProceedings of the IEEE 2014 Custom Integrated Circuits Conferenceen_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dspace.orderedauthorsZhang, Zheng; Yang, Xiu; Marucci, Giovanni; Maffezzoni, Paolo; Elfadel, Ibrahim Abe M.; Karniadakis, George; Daniel, Lucaen_US
dc.identifier.orcidhttps://orcid.org/0000-0002-5880-3151
mit.licenseOPEN_ACCESS_POLICYen_US
mit.metadata.statusComplete


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