Photonics design tool for advanced CMOS nodes
Author(s)Wade, Mark; Stojanovic, Vladimir; Alloatti, Luca; Popovic, Milos; Ram, Rajeev J.
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Recently, the authors have demonstrated large-scale integrated systems with several million transistors and hundreds of photonic elements. Yielding such large-scale integrated systems requires a design-for-manufacture rigour that is embodied in the 10 000 to 50 000 design rules that these designs must comply within advanced complementary metal-oxide semiconductor manufacturing. Here, the authors present a photonic design automation tool which allows automatic generation of layouts without design-rule violations. This tool is written in SKILL, the native language of the mainstream electric design automation software, Cadence®. This allows seamless integration of photonic and electronic design in a single environment. The tool leverages intuitive photonic layer definitions, allowing the designer to focus on the physical properties rather than on technology-dependent details. For the first time the authors present an algorithm for removal of design-rule violations from photonic layouts based on Manhattan discretisation, Boolean and sizing operations. This algorithm is not limited to the implementation in SKILL, and can in principle be implemented in any scripting language. Connectivity is achieved with software-defined waveguide ports and low-level procedures that enable auto-routing of waveguide connections.
DepartmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science; Massachusetts Institute of Technology. Research Laboratory of Electronics
Institution of Electrical Engineers (IEE)
Wade, Mark, Vladimir Stojanovic, Rajeev Jagga Ram, Luca Alloatti, and Milos Popovic. “Photonics Design Tool for Advanced CMOS Nodes.” IET Optoelectronics 9, no. 4 (August 1, 2015): 163–67.
Final published version