The Execution Migration Machine: Directoryless Shared-Memory Architecture

Author(s)
Shim, Keun Sup; Lis, Mieszko; Khan, Omer; Devadas, Srinivas
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Abstract
For certain applications involving chip multiprocessors with more than 16 cores, a directoryless architecture with fine-grained and partial-context thread migration can outperform directory-based coherence, providing lighter on-chip traffic and reduced verification complexity.
Date issued
2015-09
URI
http://hdl.handle.net/1721.1/108136
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Journal
Computer
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Shim, Keun Sup; Lis, Mieszko; Khan, Omer and Devadas, Srinivas “The Execution Migration Machine: Directoryless Shared-Memory Architecture.” Computer 48, no. 9 (September 2015): 50–59. © 2015 Institute of Electrical and Electronics Engineers (IEEE)
Version: Original manuscript
ISSN
0018-9162
1558-0814
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