dc.contributor.author | Tang, Jennifer Susan | |
dc.contributor.author | Wang, Da | |
dc.contributor.author | Polyanskiy, Yury | |
dc.contributor.author | Wornell, Gregory | |
dc.date.accessioned | 2020-05-01T19:26:05Z | |
dc.date.available | 2020-05-01T19:26:05Z | |
dc.date.issued | 2018-07 | |
dc.identifier.issn | 1557-9654 | |
dc.identifier.issn | 0018-9448 | |
dc.identifier.uri | https://hdl.handle.net/1721.1/124983 | |
dc.description.abstract | This paper addresses the problem of adding redundancy to a collection of physical objects so that the overall system is more robust to failures. In contrast to its information counterpart, which can exploit parity to protect multiple information symbols from a single erasure, physical redundancy can only be realized through duplication and substitution of objects. We propose a bipartite graph model for designing defect-tolerant systems, in which the defective objects are replaced by the judiciously connected redundant objects. The fundamental limits of this model are characterized under various asymptotic settings and both asymptotic and finite-size systems that approach these limits are constructed. Among other results, we show that the simple modular redundancy is in general suboptimal. As we develop, this combinatorial problem of defect tolerant system design has a natural interpretation as one of graph coloring, and the analysis is significantly different from that traditionally used in information redundancy for error-control codes.©2018 | en_US |
dc.language.iso | en | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | 10.1109/TIT.2017.2771417 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | MIT web domain | en_US |
dc.title | Defect tolerance: fundamental limits and examples | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Tang, Jennifer Susan, Da Wang, Yury Polyanskiy, and Gregory Wornell, "Defect tolerance: fundamental limits and examples." IEEE Transactions on Information Theory 64, 7 (July 2018): p. 5240-60 doi 10.1109/TIT.2017.2771417 ©2018 Author(s) | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.relation.journal | IEEE Transactions on Information Theory | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
dc.date.updated | 2019-07-01T17:51:37Z | |
dspace.date.submission | 2019-07-01T17:51:38Z | |
mit.journal.volume | 64 | en_US |
mit.journal.issue | 7 | en_US |
mit.metadata.status | Complete | |