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dc.contributor.authorChen, Yishen
dc.contributor.authorBrahmakshatriya, Ajay
dc.contributor.authorMendis, Thirimadura C. Yasend
dc.contributor.authorRenda, Alex
dc.contributor.authorAtkinson, Eric Hamilton
dc.contributor.authorSykora, Ondrej
dc.contributor.authorAmarasinghe, Saman P
dc.contributor.authorCarbin, Michael James
dc.date.accessioned2020-12-09T18:34:03Z
dc.date.available2020-12-09T18:34:03Z
dc.date.issued2020-03
dc.date.submitted2019-11
dc.identifier.isbn9781728140452
dc.identifier.urihttps://hdl.handle.net/1721.1/128755
dc.description.abstractCompilers and performance engineers use hardware performance models to simplify program optimizations. Performance models provide a necessary abstraction over complex modern processors. However, constructing and maintaining a performance model can be onerous, given the numerous microarchi-tectural optimizations employed by modern processors. Despite their complexity and reported inaccuracy (e.g., deviating from native measurement by more than 30%), existing performance models-such as IACA and llvm-mca-have not been systematically validated, because there is no scalable machine code profiler that can automatically obtain throughput of arbitrary basic blocks while conforming to common modeling assumptions. In this paper, we present a novel profiler that can profile arbitrary memory-accessing basic blocks without any user intervention. We used this profiler to build BHive, a benchmark for systematic validation of performance models of x86-64 basic blocks. We used BHive to evaluate four existing performance models: IACA, llvm-mca, Ithemal, and OSACA. We automatically cluster basic blocks in the benchmark suite based on their utilization of CPU resources. Using this clustering, our benchmark can give a detailed analysis of a performance model's strengths and weaknesses on different workloads (e.g., vectorized vs. scalar basic blocks). We additionally demonstrate that our dataset well captures basic properties of two Google applications: Spanner and Dremel.en_US
dc.language.isoen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/iiswc47752.2019.9042166en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceMIT web domainen_US
dc.titleBHive: A Benchmark Suite and Measurement Framework for Validating x86-64 Basic Block Performance Modelsen_US
dc.typeArticleen_US
dc.identifier.citationChen, Yishen et al. "BHive: A Benchmark Suite and Measurement Framework for Validating x86-64 Basic Block Performance Models." 2019 IEEE International Symposium on Workload Characterization, November 2019, Orlando, Florida, Institute of Electrical and Electronics Engineers, March 2020. © 2019 IEEEen_US
dc.contributor.departmentMassachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratoryen_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.relation.journal2019 IEEE International Symposium on Workload Characterizationen_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dc.date.updated2020-11-23T19:45:27Z
dspace.orderedauthorsChen, Y; Brahmakshatriya, A; Mendis, C; Renda, A; Atkinson, E; Sykora, O; Amarasinghe, S; Carbin, Men_US
dspace.date.submission2020-11-23T19:45:45Z
mit.licenseOPEN_ACCESS_POLICY
mit.metadata.statusComplete


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